a12a6ab5b9
Replaces the previous approach to define bands via hardware capabilities by the standard conforming concept of channel pages. In the short term this allows us to correctly calculate the PHY specific symbol rate and several parameters that directly depend from the symbol rate and were previously not being correctly calculated for some of the drivers whose channel pages could not be represented previously: * We now support sub-nanosecond precision symbol rates for UWB. Rounding errors are being minimized by switching from a divide-then-multiply approach to a multiply-then-divide approach. * UWB HRP: symbol rate depends on channel page specific preamble symbol rate which again requires the pulse repetition value to be known * Several MAC timings are being corrected based on the now correctly calculated symbol rates, namely aTurnaroundTime, aUnitBackoffPeriod, aBaseSuperframeDuration. In the long term, this change unlocks such highly promising functional areas as UWB ranging and SUN-PHY channel hopping in the SubG area (plus of course any other PHY specific feature). Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
128 lines
3.7 KiB
C
128 lines
3.7 KiB
C
/* ieee802154_rf2xx.h - IEEE 802.15.4 Driver definition for ATMEL RF2XX */
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/*
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* Copyright (c) 2019-2020 Gerson Fernando Budke
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_IEEE802154_IEEE802154_RF2XX_H_
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#define ZEPHYR_DRIVERS_IEEE802154_IEEE802154_RF2XX_H_
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/* Runtime context structure
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***************************
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*/
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enum rf2xx_trx_state_cmd_t {
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RF2XX_TRX_PHY_STATE_CMD_NOP = 0x00,
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RF2XX_TRX_PHY_STATE_CMD_TX_START = 0x02,
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RF2XX_TRX_PHY_STATE_CMD_FORCE_TRX_OFF = 0x03,
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RF2XX_TRX_PHY_STATE_CMD_FORCE_PLL_ON = 0x04,
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RF2XX_TRX_PHY_STATE_CMD_RX_ON = 0x06,
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RF2XX_TRX_PHY_STATE_CMD_TRX_OFF = 0x08,
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RF2XX_TRX_PHY_STATE_CMD_PLL_ON = 0x09,
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RF2XX_TRX_PHY_STATE_CMD_PREP_DEEP_SLEEP = 0x10,
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RF2XX_TRX_PHY_STATE_CMD_RX_AACK_ON = 0x16,
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RF2XX_TRX_PHY_STATE_CMD_TX_ARET_ON = 0x19,
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/* Implemented by Software */
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RF2XX_TRX_PHY_STATE_CMD_SLEEP = 0x0f,
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RF2XX_TRX_PHY_STATE_CMD_DEEP_SLEEP = 0x20,
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};
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enum rf2xx_trx_state_status_t {
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RF2XX_TRX_PHY_STATUS_P_ON = 0x00,
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RF2XX_TRX_PHY_STATUS_BUSY_RX = 0x01,
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RF2XX_TRX_PHY_STATUS_BUSY_TX = 0x02,
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RF2XX_TRX_PHY_STATUS_RX_ON = 0x06,
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RF2XX_TRX_PHY_STATUS_TRX_OFF = 0x08,
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RF2XX_TRX_PHY_STATUS_PLL_ON = 0x09,
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RF2XX_TRX_PHY_STATUS_SLEEP = 0x0f,
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RF2XX_TRX_PHY_STATUS_BUSY_RX_AACK = 0x11,
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RF2XX_TRX_PHY_STATUS_BUSY_TX_ARET = 0x12,
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RF2XX_TRX_PHY_STATUS_RX_AACK_ON = 0x16,
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RF2XX_TRX_PHY_STATUS_TX_ARET_ON = 0x19,
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RF2XX_TRX_PHY_STATUS_RX_ON_NOCLK = 0x1c,
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RF2XX_TRX_PHY_STATUS_RX_AACK_ON_NOCLK = 0x1d,
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RF2XX_TRX_PHY_STATUS_BUSY_RX_AACK_NOCLK = 0x1e,
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RF2XX_TRX_PHY_STATUS_STATE_TRANSITION = 0x1f,
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RF2XX_TRX_PHY_STATUS_MASK = 0x1f
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};
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/**
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* TRAC STATE RX_AACK TX_ARET
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* SUCCESS X X
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* SUCCESS_DATA_PENDING X
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* SUCCESS_WAIT_FOR_ACK X
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* CHANNEL_ACCESS_FAILED X
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* NO_ACK X
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* INVALID X X
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*/
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enum rf2xx_trx_state_trac_t {
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RF2XX_TRX_PHY_STATE_TRAC_SUCCESS = 0x00,
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RF2XX_TRX_PHY_STATE_TRAC_SUCCESS_DATA_PENDING = 0x01,
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RF2XX_TRX_PHY_STATE_TRAC_SUCCESS_WAIT_FOR_ACK = 0x02,
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RF2XX_TRX_PHY_STATE_TRAC_CHANNEL_ACCESS_FAILED = 0x03,
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RF2XX_TRX_PHY_STATE_TRAC_NO_ACK = 0x05,
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RF2XX_TRX_PHY_STATE_TRAC_INVALID = 0x07,
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};
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enum rf2xx_trx_model_t {
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RF2XX_TRX_MODEL_INV = 0x00,
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RF2XX_TRX_MODEL_230 = 0x02,
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RF2XX_TRX_MODEL_231 = 0x03,
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RF2XX_TRX_MODEL_212 = 0x07,
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RF2XX_TRX_MODEL_232 = 0x0A,
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RF2XX_TRX_MODEL_233 = 0x0B,
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};
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struct rf2xx_config {
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struct gpio_dt_spec irq_gpio;
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struct gpio_dt_spec reset_gpio;
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struct gpio_dt_spec slptr_gpio;
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struct gpio_dt_spec dig2_gpio;
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struct gpio_dt_spec clkm_gpio;
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struct spi_dt_spec spi;
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uint8_t inst;
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uint8_t has_mac;
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uint8_t const *tx_pwr_table;
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uint8_t tx_pwr_table_size;
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int8_t tx_pwr_min[2];
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int8_t tx_pwr_max[2];
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};
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struct rf2xx_context {
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struct net_if *iface;
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const struct device *dev;
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struct gpio_callback irq_cb;
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struct k_thread trx_thread;
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K_KERNEL_STACK_MEMBER(trx_stack,
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CONFIG_IEEE802154_RF2XX_RX_STACK_SIZE);
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struct k_sem trx_isr_lock;
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struct k_sem trx_tx_sync;
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enum rf2xx_trx_model_t trx_model;
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/* PHY specific driver attributes */
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enum ieee802154_phy_channel_page cc_page;
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struct ieee802154_phy_channel_range cc_range;
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struct ieee802154_phy_supported_channels cc_channels;
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enum rf2xx_trx_state_trac_t trx_trac;
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enum ieee802154_tx_mode tx_mode;
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uint8_t mac_addr[8];
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uint8_t pkt_lqi;
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uint8_t pkt_ed;
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int8_t trx_rssi_base;
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uint8_t trx_version;
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uint8_t rx_phr;
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bool promiscuous;
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};
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#endif /* ZEPHYR_DRIVERS_IEEE802154_IEEE802154_RF2XX_H_ */
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