zephyr/drivers/gpio/gpio_xlnx_ps.h
Immo Birnbaum fef27d8231 drivers: gpio: xlnx_ps: switch driver over to DEVICE_MMIO mapping
Set up a named device MMIO memory mapping in the GPIO controller's
parent device, map the virtual memory in the init function of the
parent device.

Once the controller's register space has been successfully mapped,
propagate the mapped virtual address to all child (= GPIO bank)
devices. While it is possible to add a named mapping to every
single GPIO bank device and initialize it in the respective bank
device's init function, this would result in multiple virtual
address mappings all pointing to the same 4k of physical memory.
I assume that, although all those mappings having the same attri-
butes, such a setup is at least discouraged.

Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
2024-12-19 19:56:23 +01:00

49 lines
1.3 KiB
C

/*
* Xilinx Processor System MIO / EMIO GPIO controller driver
*
* Driver private data declarations, parent (IRQ handler) module
*
* Copyright (c) 2022, Weidmueller Interface GmbH & Co. KG
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DRIVERS_GPIO_GPIO_XLNX_PS_H_
#define _ZEPHYR_DRIVERS_GPIO_GPIO_XLNX_PS_H_
/* Type definitions */
/* IRQ handler function type */
typedef void (*gpio_xlnx_ps_config_irq_t)(const struct device *dev);
/**
* @brief Run-time modifiable device data structure.
*
* This struct contains all data of the PS GPIO controller parent
* (IRQ handler) which is modifiable at run-time.
*/
struct gpio_xlnx_ps_dev_data {
struct gpio_driver_data common;
DEVICE_MMIO_NAMED_RAM(reg_base);
mem_addr_t base;
};
/**
* @brief Constant device configuration data structure.
*
* This struct contains all data of the PS GPIO controller parent
* which is required for proper operation (such as base memory
* addresses, references to all associated banks etc.) which don't
* have to and therefore cannot be modified at run-time.
*/
struct gpio_xlnx_ps_dev_cfg {
struct gpio_driver_config common;
DEVICE_MMIO_NAMED_ROM(reg_base);
const struct device *const *bank_devices;
uint32_t num_banks;
gpio_xlnx_ps_config_irq_t config_func;
};
#endif /* _ZEPHYR_DRIVERS_GPIO_GPIO_XLNX_PS_H_ */