2d93f03c25
RT1718S is an i2c-based TCPC chip that supports 3 additional GPIOs. The pins can be used for USB-C operations e.g. handling FRS, but they can also work as usual GPIOs. Add a driver for the RT1718S GPIO and a handler for an alert signal from the chip. The handler reads the alert register once asserted and calls the GPIO interrupt handler if needed(Vendor-defined alert). gpio_rt1718s.c file and "richtek,rt1718s" node collect common properties and data for all RS1718S functionalities. The file can be extended for TCPC driver. rt1718s.h file also defines inline functions with i2c operations common for all drivers. The common header and source files can be moved to tcpc directories once the tcpc driver is added since it is the main functionality. Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
172 lines
5 KiB
C
172 lines
5 KiB
C
/*
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* Copyright 2022 Google LLC
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_GPIO_RT1718S_H_
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#define ZEPHYR_DRIVERS_GPIO_RT1718S_H_
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#include <zephyr/device.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/kernel.h>
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#define RT1718S_GPIO_NUM 3
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#define RT1718S_REG_ALERT 0x10
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#define RT1718S_REG_ALERT_VENDOR_DEFINED_ALERT BIT(15)
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#define RT1718S_REG_ALERT_MASK 0x12
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#define RT1718S_REG_ALERT_MASK_VENDOR_DEFINED_ALERT BIT(15)
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#define RT1718S_REG_RT_MASK8 0xA6
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#define RT1718S_REG_RT_MASK8_GPIO1_R BIT(0)
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#define RT1718S_REG_RT_MASK8_GPIO2_R BIT(1)
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#define RT1718S_REG_RT_MASK8_GPIO3_R BIT(2)
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#define RT1718S_REG_RT_MASK8_GPIO1_F BIT(4)
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#define RT1718S_REG_RT_MASK8_GPIO2_F BIT(5)
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#define RT1718S_REG_RT_MASK8_GPIO3_F BIT(6)
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#define RT1718S_REG_RT_INT8 0xA8
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#define RT1718S_REG_RT_INT8_GPIO1_R BIT(0)
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#define RT1718S_REG_RT_INT8_GPIO2_R BIT(1)
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#define RT1718S_REG_RT_INT8_GPIO3_R BIT(2)
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#define RT1718S_REG_RT_INT8_GPIO1_F BIT(4)
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#define RT1718S_REG_RT_INT8_GPIO2_F BIT(5)
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#define RT1718S_REG_RT_INT8_GPIO3_F BIT(6)
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#define RT1718S_GPIO_INT_MASK \
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(RT1718S_REG_RT_INT8_GPIO1_R | RT1718S_REG_RT_INT8_GPIO2_R | RT1718S_REG_RT_INT8_GPIO3_R | \
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RT1718S_REG_RT_INT8_GPIO1_F | RT1718S_REG_RT_INT8_GPIO2_F | RT1718S_REG_RT_INT8_GPIO3_F)
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#define RT1718S_REG_RT_ST8 0xAA
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#define RT1718S_REG_RT_ST8_GPIO1_I BIT(0)
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#define RT1718S_REG_RT_ST8_GPIO2_I BIT(1)
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#define RT1718S_REG_RT_ST8_GPIO3_I BIT(2)
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#define RT1718S_REG_GPIO_CTRL(pin) (0xED + pin)
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#define RT1718S_REG_GPIO_CTRL_PU BIT(5)
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#define RT1718S_REG_GPIO_CTRL_PD BIT(4)
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#define RT1718S_REG_GPIO_CTRL_OD_N BIT(3)
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#define RT1718S_REG_GPIO_CTRL_OE BIT(2)
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#define RT1718S_REG_GPIO_CTRL_O BIT(1)
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#define RT1718S_REG_GPIO_CTRL_I BIT(0)
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/* RT1718S chip driver config */
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struct rt1718s_config {
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/* I2C device */
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const struct i2c_dt_spec i2c_dev;
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/* Alert GPIO pin */
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const struct gpio_dt_spec irq_gpio;
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/* GPIO port device */
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const struct device *gpio_port_dev;
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};
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/* RT1718S chip driver data */
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struct rt1718s_data {
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/* RT1718S device */
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const struct device *dev;
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/* lock TCPCI registers access */
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struct k_sem lock_tcpci;
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/* Alert pin callback */
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struct gpio_callback gpio_cb;
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/* Alert worker */
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struct k_work alert_worker;
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};
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/**
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* @brief Read a RT1718S register
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*
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* @param dev RT1718S device
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* @param reg_addr Register address
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* @param val A pointer to a buffer for the data to return
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*
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* @return 0 if successful, otherwise failed.
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*/
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static inline int rt1718s_reg_read_byte(const struct device *dev, uint8_t reg_addr, uint8_t *val)
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{
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const struct rt1718s_config *const config = (const struct rt1718s_config *)dev->config;
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return i2c_reg_read_byte_dt(&config->i2c_dev, reg_addr, val);
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}
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/**
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* @brief Read a sequence of RT1718S registers
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*
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* @param dev RT1718S device
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* @param start_addr The register start address
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* @param buf A pointer to a buffer for the data to return
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* @param num_bytes Number of data to read
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*
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* @return 0 if successful, otherwise failed.
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*/
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static inline int rt1718s_reg_burst_read(const struct device *dev, uint8_t start_addr, uint8_t *buf,
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uint32_t num_bytes)
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{
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const struct rt1718s_config *const config = (const struct rt1718s_config *)dev->config;
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return i2c_burst_read_dt(&config->i2c_dev, start_addr, buf, num_bytes);
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}
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/**
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* @brief Write a RT1718S register
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*
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* @param dev RT1718S device
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* @param reg_addr Register address
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* @param val Data to write
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*
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* @return 0 if successful, otherwise failed.
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*/
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static inline int rt1718s_reg_write_byte(const struct device *dev, uint8_t reg_addr, uint8_t val)
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{
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const struct rt1718s_config *const config = (const struct rt1718s_config *)dev->config;
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return i2c_reg_write_byte_dt(&config->i2c_dev, reg_addr, val);
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}
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/**
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* @brief Write a sequence of RT1718S registers
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*
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* @param dev RT1718S device
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* @param start_addr The register start address
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* @param buf A pointer to a buffer for the data to write
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* @param num_bytes Number of data to write
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*
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* @return 0 if successful, otherwise failed.
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*/
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static inline int rt1718s_reg_burst_write(const struct device *dev, uint8_t start_addr,
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uint8_t *buf, uint32_t num_bytes)
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{
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const struct rt1718s_config *const config = (const struct rt1718s_config *)dev->config;
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return i2c_burst_write_dt(&config->i2c_dev, start_addr, buf, num_bytes);
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}
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/**
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* @brief Compare data & write a RT1718S register
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*
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* @param dev RT1718S device
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* @param reg_addr Register address
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* @param reg_val Old register data
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* @param new_val New register data
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*
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* @return 0 if successful, otherwise failed.
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*/
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static inline int rt1718s_reg_update(const struct device *dev, uint8_t reg_addr, uint8_t reg_val,
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uint8_t new_val)
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{
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if (reg_val == new_val)
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return 0;
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return rt1718s_reg_write_byte(dev, reg_addr, new_val);
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}
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/**
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* @brief Dispatch GPIO port alert
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*
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* @param dev RT1718S device
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*/
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void rt1718s_gpio_alert_handler(const struct device *dev);
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#endif /* ZEPHYR_DRIVERS_GPIO_RT1718S_H_*/
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