a026370461
To properly setup L1 exit timing this patch will use buffer interrupt for HOST DMA and wait for Host HDA to actually start First interrupt will clear all others. Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com> Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
48 lines
1.9 KiB
C
48 lines
1.9 KiB
C
/*
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* Copyright (c) 2022 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT intel_adsp_hda_link_out
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#include <zephyr/drivers/dma.h>
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#include "dma_intel_adsp_hda.h"
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#define LOG_LEVEL CONFIG_DMA_LOG_LEVEL
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(dma_intel_adsp_hda_dma_link_out);
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static const struct dma_driver_api intel_adsp_hda_dma_link_out_api = {
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.config = intel_adsp_hda_dma_link_out_config,
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.reload = intel_adsp_hda_dma_link_reload,
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.start = intel_adsp_hda_dma_start,
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.stop = intel_adsp_hda_dma_stop,
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.suspend = intel_adsp_hda_dma_stop,
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.get_status = intel_adsp_hda_dma_status,
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.get_attribute = intel_adsp_hda_dma_get_attribute,
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.chan_filter = intel_adsp_hda_dma_chan_filter,
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};
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#define INTEL_ADSP_HDA_DMA_LINK_OUT_INIT(inst) \
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static const struct intel_adsp_hda_dma_cfg intel_adsp_hda_dma##inst##_config = { \
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.base = DT_INST_REG_ADDR(inst), \
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.regblock_size = DT_INST_REG_SIZE(inst), \
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.dma_channels = DT_INST_PROP(inst, dma_channels), \
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.direction = MEMORY_TO_PERIPHERAL, \
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.irq_config = NULL \
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}; \
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\
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static struct intel_adsp_hda_dma_data intel_adsp_hda_dma##inst##_data = {}; \
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\
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PM_DEVICE_DT_INST_DEFINE(inst, intel_adsp_hda_dma_pm_action); \
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\
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DEVICE_DT_INST_DEFINE(inst, &intel_adsp_hda_dma_init, \
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PM_DEVICE_DT_INST_GET(inst), \
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&intel_adsp_hda_dma##inst##_data, \
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&intel_adsp_hda_dma##inst##_config, POST_KERNEL, \
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CONFIG_DMA_INIT_PRIORITY, \
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&intel_adsp_hda_dma_link_out_api);
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DT_INST_FOREACH_STATUS_OKAY(INTEL_ADSP_HDA_DMA_LINK_OUT_INIT)
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