e8f1c17e79
Update boards that use to declare ethernet support to enable matching ethernet node. Similarly to other devices, use dts API to control ethernet pin settings. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
83 lines
2.8 KiB
C
83 lines
2.8 KiB
C
/*
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* Copyright (c) 2018 Yurii Hamann
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <drivers/pinmux.h>
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#include <sys/sys_io.h>
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#include <pinmux/stm32/pinmux_stm32.h>
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/* pin assignments for STM32F746G-DISCO board */
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static const struct pin_config pinconf[] = {
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay) && CONFIG_SERIAL
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{STM32_PIN_PA9, STM32F7_PINMUX_FUNC_PA9_USART1_TX},
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{STM32_PIN_PB7, STM32F7_PINMUX_FUNC_PB7_USART1_RX},
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart6), okay) && CONFIG_SERIAL
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{STM32_PIN_PC6, STM32F7_PINMUX_FUNC_PC6_USART6_TX},
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{STM32_PIN_PC7, STM32F7_PINMUX_FUNC_PC7_USART6_RX},
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pwm3), okay) && CONFIG_PWM
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{STM32_PIN_PB4, STM32F7_PINMUX_FUNC_PB4_PWM3_CH1},
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET
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{STM32_PIN_PC1, STM32F7_PINMUX_FUNC_PC1_ETH},
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{STM32_PIN_PC4, STM32F7_PINMUX_FUNC_PC4_ETH},
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{STM32_PIN_PC5, STM32F7_PINMUX_FUNC_PC5_ETH},
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{STM32_PIN_PA1, STM32F7_PINMUX_FUNC_PA1_ETH},
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{STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_ETH},
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{STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_ETH},
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{STM32_PIN_PG11, STM32F7_PINMUX_FUNC_PG11_ETH},
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{STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH},
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{STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_ETH},
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C
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{STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL},
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{STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA},
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c3), okay) && CONFIG_I2C
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{STM32_PIN_PH7, STM32F7_PINMUX_FUNC_PH7_I2C3_SCL},
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{STM32_PIN_PH8, STM32F7_PINMUX_FUNC_PH8_I2C3_SDA},
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PI0, STM32F7_PINMUX_FUNC_PI0_SPI2_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PI1, STM32F7_PINMUX_FUNC_PI1_SPI2_SCK},
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{STM32_PIN_PB14, STM32F7_PINMUX_FUNC_PB14_SPI2_MISO},
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{STM32_PIN_PB15, STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI},
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#endif
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#ifdef CONFIG_USB_DC_STM32
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{STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM},
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{STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP},
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#endif /* CONFIG_USB_DC_STM32 */
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdmmc1), okay) && \
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CONFIG_DISK_ACCESS_STM32_SDMMC
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{STM32_PIN_PC8, STM32F7_PINMUX_FUNC_PC8_SDMMC1_D0},
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{STM32_PIN_PC9, STM32F7_PINMUX_FUNC_PC9_SDMMC1_D1},
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{STM32_PIN_PC10, STM32F7_PINMUX_FUNC_PC10_SDMMC1_D2},
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{STM32_PIN_PC11, STM32F7_PINMUX_FUNC_PC11_SDMMC1_D3},
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{STM32_PIN_PC12, STM32F7_PINMUX_FUNC_PC12_SDMMC1_CK},
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{STM32_PIN_PC13, STM32_MODER_INPUT_MODE},
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{STM32_PIN_PD2, STM32F7_PINMUX_FUNC_PD2_SDMMC1_CMD},
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#endif
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};
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static int pinmux_stm32_init(struct device *port)
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{
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ARG_UNUSED(port);
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stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
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return 0;
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}
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SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
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CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
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