44d32acc43
Enable GPIO as a workaround to enable some SPI slaves are not correctly controlled using the Flexcomm SPI device. Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
161 lines
4.2 KiB
C
161 lines
4.2 KiB
C
/*
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* Copyright (c) 2019, NXP
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <init.h>
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#include <drivers/pinmux.h>
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#include <fsl_common.h>
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#include <fsl_iocon.h>
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#include <soc.h>
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static int lpcxpresso_55s69_pinmux_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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#ifdef CONFIG_PINMUX_MCUX_LPC_PORT0
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struct device *port0 =
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device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT0_NAME);
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#endif
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#ifdef CONFIG_PINMUX_MCUX_LPC_PORT1
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struct device *port1 =
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device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME);
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#endif
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#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) && CONFIG_SERIAL
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/* USART0 RX, TX */
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const uint32_t port0_pin29_config = (
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IOCON_PIO_FUNC1 |
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IOCON_PIO_MODE_INACT |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI
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);
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const uint32_t port0_pin30_config = (
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IOCON_PIO_FUNC1 |
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IOCON_PIO_MODE_INACT |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI
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);
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pinmux_pin_set(port0, 29, port0_pin29_config);
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pinmux_pin_set(port0, 30, port0_pin30_config);
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#endif
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#if DT_PHA_HAS_CELL(DT_ALIAS(sw0), gpios, pin)
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const uint32_t sw0_config = (
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IOCON_PIO_FUNC0 |
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IOCON_PIO_MODE_PULLUP |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_INPFILT_OFF |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI
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);
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pinmux_pin_set(port0, DT_GPIO_PIN(DT_ALIAS(sw0), gpios), sw0_config);
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#endif
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#if DT_PHA_HAS_CELL(DT_ALIAS(sw1), gpios, pin)
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const uint32_t sw1_config = (
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IOCON_PIO_FUNC0 |
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IOCON_PIO_MODE_PULLUP |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_INPFILT_OFF |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI
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);
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pinmux_pin_set(port1, DT_GPIO_PIN(DT_ALIAS(sw1), gpios), sw1_config);
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#endif
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#if DT_PHA_HAS_CELL(DT_ALIAS(sw2), gpios, pin)
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const uint32_t sw2_config = (
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IOCON_PIO_FUNC0 |
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IOCON_PIO_MODE_PULLUP |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_INPFILT_OFF |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI
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);
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pinmux_pin_set(port1, DT_GPIO_PIN(DT_ALIAS(sw2), gpios), sw2_config);
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#endif
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#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm4), nxp_lpc_i2c, okay) && CONFIG_I2C
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/* PORT1 PIN20 is configured as FC4_TXD_SCL_MISO_WS */
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pinmux_pin_set(port1, 20, IOCON_PIO_FUNC5 |
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IOCON_PIO_MODE_INACT |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN21 is configured as FC4_RXD_SDA_MOSI_DATA */
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pinmux_pin_set(port1, 21, IOCON_PIO_FUNC5 |
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IOCON_PIO_MODE_INACT |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_OPENDRAIN_DI);
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#endif
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#ifdef CONFIG_FXOS8700_TRIGGER
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pinmux_pin_set(port1, 19, IOCON_PIO_FUNC0 |
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IOCON_PIO_MODE_PULLUP |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_INPFILT_OFF |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(hs_lspi), okay) && CONFIG_SPI
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/* PORT0 PIN26 is configured as HS_SPI_MOSI */
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pinmux_pin_set(port0, 26, IOCON_PIO_FUNC9 |
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IOCON_PIO_MODE_PULLUP |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI);
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uint32_t pio_func = IOCON_PIO_FUNC5; /* Flexcomm controlled CS*/
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#if DT_NODE_HAS_PROP(DT_NODELABEL(hs_lspi), cs_gpios)
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pio_func = IOCON_PIO_FUNC0; /* GPIO controlled CS*/
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#endif
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/* PORT1 PIN1 is configured as HS_SPI_SSEL1 */
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pinmux_pin_set(port1, 1, pio_func |
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IOCON_PIO_MODE_PULLUP |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN2 is configured as HS_SPI_SCK */
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pinmux_pin_set(port1, 2, IOCON_PIO_FUNC6 |
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IOCON_PIO_MODE_PULLUP |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN3 is configured as HS_SPI_MISO */
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pinmux_pin_set(port1, 3, IOCON_PIO_FUNC6 |
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IOCON_PIO_MODE_PULLUP |
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IOCON_PIO_INV_DI |
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IOCON_PIO_DIGITAL_EN |
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IOCON_PIO_SLEW_STANDARD |
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IOCON_PIO_OPENDRAIN_DI);
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#endif
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return 0;
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}
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SYS_INIT(lpcxpresso_55s69_pinmux_init, PRE_KERNEL_1,
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CONFIG_PINMUX_INIT_PRIORITY);
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