zephyr/tests/arch/riscv
Aleksandar Cecaric 0f1d93cb4f include: riscv: add RISC-V arch atomic instructions
Add RISC-V architecture specific atomic instructions, not present in
atomic_builtin.h

Signed-off-by: Aleksandar Cecaric <aleksandar.cecaric@nextsilicon.com>
2024-06-01 10:27:32 +02:00
..
atomic include: riscv: add RISC-V arch atomic instructions 2024-06-01 10:27:32 +02:00
fpu_sharing riscv: FPU trap: test case thread typo fix 2024-05-10 11:38:57 +03:00