0967f13c3f
Add a property to select the push-pull GPIO output type to drive the I2C recovery. The default is open-drain. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
111 lines
2.9 KiB
YAML
111 lines
2.9 KiB
YAML
# Copyright (c) 2022 ITE Corporation. All Rights Reserved.
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
description: Common fields for ITE it8xxx2 I2C
|
|
|
|
include: [i2c-controller.yaml, pinctrl-device.yaml]
|
|
|
|
properties:
|
|
reg:
|
|
required: true
|
|
|
|
interrupts:
|
|
required: true
|
|
|
|
port-num:
|
|
type: int
|
|
required: true
|
|
enum:
|
|
- 0
|
|
- 1
|
|
- 2
|
|
- 3
|
|
- 4
|
|
- 5
|
|
description: Ordinal identifying the port
|
|
0 = SMB_CHANNEL_A,
|
|
1 = SMB_CHANNEL_B,
|
|
2 = SMB_CHANNEL_C,
|
|
3 = I2C_CHANNEL_D,
|
|
4 = I2C_CHANNEL_E,
|
|
5 = I2C_CHANNEL_F,
|
|
|
|
channel-switch-sel:
|
|
type: int
|
|
required: true
|
|
enum:
|
|
- 0
|
|
- 1
|
|
- 2
|
|
- 3
|
|
- 4
|
|
- 5
|
|
description: |
|
|
The default setting is as described below
|
|
0 = I2C_CHA_LOCATE: Channel A is located at SMCLK0/SMDAT0
|
|
1 = I2C_CHB_LOCATE: Channel B is located at SMCLK1/SMDAT1
|
|
2 = I2C_CHC_LOCATE: Channel C is located at SMCLK2/SMDAT2
|
|
3 = I2C_CHD_LOCATE: Channel D is located at SMCLK3/SMDAT3
|
|
4 = I2C_CHE_LOCATE: Channel E is located at SMCLK4/SMDAT4
|
|
5 = I2C_CHF_LOCATE: Channel F is located at SMCLK5/SMDAT5
|
|
|
|
The following is an example of the 'channel-switch-sel' property
|
|
being swapped between node &i2c0 and &i2c2 in the application:
|
|
Note: The property of 'port-num' cannot be changed in the
|
|
application.
|
|
|
|
Channel C is located at SMCLK0/SMDAT0:
|
|
&i2c0 {
|
|
channel-switch-sel = <I2C_CHC_LOCATE>;
|
|
pinctrl-0 = <&i2c2_clk_gpf6_default
|
|
&i2c2_data_gpf7_default>;
|
|
pinctrl-names = "default";
|
|
scl-gpios = <&gpiof 6 0>;
|
|
sda-gpios = <&gpiof 7 0>;
|
|
};
|
|
|
|
Channel A is located at SMCLK2/SMDAT2:
|
|
&i2c2 {
|
|
channel-switch-sel = <I2C_CHA_LOCATE>;
|
|
pinctrl-0 = <&i2c0_clk_gpb3_default
|
|
&i2c0_data_gpb4_default>;
|
|
pinctrl-names = "default";
|
|
scl-gpios = <&gpiob 3 0>;
|
|
sda-gpios = <&gpiob 4 0>;
|
|
};
|
|
|
|
If the property of 'channel-switch-sel' is changed, the pinctrl
|
|
setting and recovery pin in &i2c0 and &i2c2 nodes must also be
|
|
modified accordingly.
|
|
|
|
scl-gpios:
|
|
type: phandle-array
|
|
required: true
|
|
description: |
|
|
The SCL pin for the selected port.
|
|
|
|
sda-gpios:
|
|
type: phandle-array
|
|
required: true
|
|
description: |
|
|
The SDA pin for the selected port.
|
|
|
|
clock-gate-offset:
|
|
type: int
|
|
required: true
|
|
description: |
|
|
The clock gate offsets combine the register offset from
|
|
ECPM_BASE and the mask within that register into one value.
|
|
|
|
pinctrl-0:
|
|
required: true
|
|
|
|
pinctrl-names:
|
|
required: true
|
|
|
|
push-pull-recovery:
|
|
type: boolean
|
|
description: |
|
|
This property is enabled when selecting the push-pull GPIO output
|
|
type to drive the I2C recovery. The default is open-drain.
|