e57bab59ff
Add a driver for the Xilinx AXI Timebase WDT logic core. This can be instantiated on various Xilinx FPGA-based platforms such as the Digilent Arty, although it is not part of the default image used with the Zephyr board configuration. The driver can also optionally implement the HWINFO API to allow determining whether the last system reset was initiated by the WDT. Since this is a standalone IP core which could be used a variety of configurations, this support is optional in case the system/SoC it is used with already implements this support. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
26 lines
698 B
Plaintext
26 lines
698 B
Plaintext
# Xilinx watchdog configuration
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# Copyright (c) 2023, Calian
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# SPDX-License-Identifier: Apache-2.0
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config WDT_XILINX_AXI
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bool "Xilinx AXI Timebase WDT driver"
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default y
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depends on DT_HAS_XLNX_XPS_TIMEBASE_WDT_1_00_A_ENABLED
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help
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Enable the Xilinx AXI Timebase WDT driver.
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if WDT_XILINX_AXI
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config WDT_XILINX_AXI_HWINFO_API
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bool "Expose HWINFO API in Xilinx AXI Timebase WDT driver"
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default y
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select HWINFO
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help
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Controls whether the Xilinx AXI Timebase WDT driver exposes a HWINFO
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API which allows determining whether the WDT initiated the last
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system reset. This may need to be disabled if using a device or SoC
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which already implements this API.
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endif # WDT_XILINX_AXI
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