75165050f7
Remove address-of operator ('&') when assigning `gpio_xxx_init`
function pointer in `DEVICE_DT_INST_DEFINE` macro.
This change aims to maintain consistency among the drivers in
`drivers/gpio`, ensuring that all function pointer assignments
follow the same pattern.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
343 lines
8.3 KiB
C
343 lines
8.3 KiB
C
/* Copyright (c) 2023 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT intel_sedi_gpio
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#include "sedi_driver_gpio.h"
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include <zephyr/pm/device.h>
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struct gpio_sedi_config {
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/* gpio_driver_data needs to be first */
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struct gpio_driver_config common;
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sedi_gpio_t device;
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uint32_t pin_nums;
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void (*irq_config)(void);
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DEVICE_MMIO_ROM;
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};
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struct gpio_sedi_data {
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/* gpio_driver_data needs to be first */
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struct gpio_driver_config common;
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sys_slist_t callbacks;
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DEVICE_MMIO_RAM;
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};
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static int gpio_sedi_init(const struct device *dev);
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#ifdef CONFIG_PM_DEVICE
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static int gpio_sedi_suspend_device(const struct device *dev)
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{
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const struct gpio_sedi_config *config = dev->config;
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sedi_gpio_t gpio_dev = config->device;
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int ret;
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if (pm_device_is_busy(dev)) {
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return -EBUSY;
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}
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ret = sedi_gpio_set_power(gpio_dev, SEDI_POWER_SUSPEND);
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if (ret != SEDI_DRIVER_OK) {
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return -EIO;
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}
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return 0;
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}
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static int gpio_sedi_resume_device_from_suspend(const struct device *dev)
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{
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const struct gpio_sedi_config *config = dev->config;
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sedi_gpio_t gpio_dev = config->device;
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int ret;
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ret = sedi_gpio_set_power(gpio_dev, SEDI_POWER_FULL);
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if (ret != SEDI_DRIVER_OK) {
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return -EIO;
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}
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return 0;
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}
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static int gpio_sedi_pm_action(const struct device *dev,
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enum pm_device_action action)
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{
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int ret = 0;
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switch (action) {
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case PM_DEVICE_ACTION_SUSPEND:
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ret = gpio_sedi_suspend_device(dev);
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break;
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case PM_DEVICE_ACTION_RESUME:
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ret = gpio_sedi_resume_device_from_suspend(dev);
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break;
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default:
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ret = -ENOTSUP;
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}
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return ret;
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}
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#endif /* CONFIG_PM_DEVICE */
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static void gpio_sedi_callback(const uint32_t pin_mask,
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const sedi_gpio_port_t port,
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void *param)
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{
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ARG_UNUSED(port);
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struct device *dev = (struct device *)param;
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struct gpio_sedi_data *data =
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(struct gpio_sedi_data *)(dev->data);
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/* call the callbacks */
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gpio_fire_callbacks(&data->callbacks, dev, pin_mask);
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}
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static void gpio_sedi_write_raw(const struct device *dev,
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uint32_t pins,
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bool is_clear)
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{
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uint8_t i;
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const struct gpio_sedi_config *config = dev->config;
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sedi_gpio_t gpio_dev = config->device;
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sedi_gpio_pin_state_t val;
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if (is_clear) {
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val = SEDI_GPIO_STATE_LOW;
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} else {
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val = SEDI_GPIO_STATE_HIGH;
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}
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for (i = 0; i < config->pin_nums; i++) {
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if (pins & 0x1) {
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sedi_gpio_write_pin(gpio_dev, i, val);
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}
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pins >>= 1;
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if (pins == 0) {
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break;
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}
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}
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}
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static int gpio_sedi_configure(const struct device *dev, gpio_pin_t pin,
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gpio_flags_t flags)
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{
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const struct gpio_sedi_config *config = dev->config;
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sedi_gpio_t gpio_dev = config->device;
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sedi_gpio_pin_config_t pin_config = { 0 };
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if ((flags & GPIO_OUTPUT) && (flags & GPIO_INPUT)) {
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/* Pin cannot be configured as input and output */
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return -ENOTSUP;
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} else if (!(flags & (GPIO_INPUT | GPIO_OUTPUT))) {
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/* Pin has to be configured as input or output */
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return -ENOTSUP;
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}
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pin_config.enable_interrupt = false;
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/* Map direction */
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if (flags & GPIO_OUTPUT) {
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pin_config.direction = SEDI_GPIO_DIR_MODE_OUTPUT;
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sedi_gpio_config_pin(gpio_dev, pin, pin_config);
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/* Set start state */
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0) {
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sedi_gpio_write_pin(gpio_dev, pin, 1);
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0) {
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sedi_gpio_write_pin(gpio_dev, pin, 0);
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}
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} else {
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pin_config.direction = SEDI_GPIO_DIR_MODE_INPUT;
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sedi_gpio_config_pin(gpio_dev, pin, pin_config);
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}
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return 0;
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}
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static int gpio_sedi_get_raw(const struct device *dev, uint32_t *value)
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{
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const struct gpio_sedi_config *config = dev->config;
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sedi_gpio_t gpio_dev = config->device;
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*value = sedi_gpio_read_pin_32bits(gpio_dev, 0);
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return 0;
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}
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static int gpio_sedi_set_masked_raw(const struct device *dev,
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uint32_t mask,
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uint32_t value)
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{
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gpio_sedi_write_raw(dev, (mask & value), false);
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return 0;
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}
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static int gpio_sedi_set_bits_raw(const struct device *dev, uint32_t pins)
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{
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gpio_sedi_write_raw(dev, pins, false);
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return 0;
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}
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static int gpio_sedi_clear_bits_raw(const struct device *dev, uint32_t pins)
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{
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gpio_sedi_write_raw(dev, pins, true);
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return 0;
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}
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static int gpio_sedi_toggle_bits(const struct device *dev, uint32_t pins)
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{
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const struct gpio_sedi_config *config = dev->config;
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sedi_gpio_t gpio_dev = config->device;
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uint8_t i;
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for (i = 0; i < config->pin_nums; i++) {
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if (pins & 0x1) {
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sedi_gpio_toggle_pin(gpio_dev, i);
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}
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pins >>= 1;
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if (pins == 0) {
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break;
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}
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}
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return 0;
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}
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static int gpio_sedi_interrupt_configure(const struct device *dev,
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gpio_pin_t pin,
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enum gpio_int_mode mode,
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enum gpio_int_trig trig)
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{
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const struct gpio_sedi_config *config = dev->config;
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sedi_gpio_t gpio_dev = config->device;
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sedi_gpio_pin_config_t pin_config = { 0 };
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/* Not support level trigger */
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if (mode == GPIO_INT_MODE_LEVEL) {
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return -EINVAL;
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}
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/* Only input needs interrupt enabled */
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pin_config.direction = SEDI_GPIO_DIR_MODE_INPUT;
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pin_config.enable_wakeup = true;
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if (mode == GPIO_INT_MODE_DISABLED) {
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pin_config.enable_interrupt = false;
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} else {
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pin_config.enable_interrupt = true;
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switch (trig) {
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case GPIO_INT_TRIG_LOW:
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pin_config.interrupt_mode =
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SEDI_GPIO_INT_MODE_FALLING_EDGE;
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break;
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case GPIO_INT_TRIG_HIGH:
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pin_config.interrupt_mode =
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SEDI_GPIO_INT_MODE_RISING_EDGE;
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break;
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case GPIO_INT_TRIG_BOTH:
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pin_config.interrupt_mode =
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SEDI_GPIO_INT_MODE_BOTH_EDGE;
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break;
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default:
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return -EINVAL;
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}
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}
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/* Configure interrupt mode */
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sedi_gpio_config_pin(gpio_dev, pin, pin_config);
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return 0;
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}
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static int gpio_sedi_manage_callback(const struct device *dev,
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struct gpio_callback *callback,
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bool set)
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{
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struct gpio_sedi_data *data = dev->data;
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gpio_manage_callback(&(data->callbacks), callback, set);
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return 0;
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}
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static uint32_t gpio_sedi_get_pending(const struct device *dev)
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{
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const struct gpio_sedi_config *config = dev->config;
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sedi_gpio_t gpio_dev = config->device;
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return sedi_gpio_get_gisr(gpio_dev, 0);
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}
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static const struct gpio_driver_api gpio_sedi_driver_api = {
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.pin_configure = gpio_sedi_configure,
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.port_get_raw = gpio_sedi_get_raw,
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.port_set_masked_raw = gpio_sedi_set_masked_raw,
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.port_set_bits_raw = gpio_sedi_set_bits_raw,
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.port_clear_bits_raw = gpio_sedi_clear_bits_raw,
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.port_toggle_bits = gpio_sedi_toggle_bits,
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.pin_interrupt_configure = gpio_sedi_interrupt_configure,
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.manage_callback = gpio_sedi_manage_callback,
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.get_pending_int = gpio_sedi_get_pending
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};
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extern void gpio_isr(IN sedi_gpio_t gpio_device);
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static int gpio_sedi_init(const struct device *dev)
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{
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int ret;
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const struct gpio_sedi_config *config = dev->config;
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sedi_gpio_t gpio_dev = config->device;
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DEVICE_MMIO_MAP(dev, K_MEM_CACHE_NONE);
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/* Call sedi gpio init */
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ret = sedi_gpio_init(gpio_dev, gpio_sedi_callback, (void *)dev);
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if (ret != 0) {
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return ret;
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}
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sedi_gpio_set_power(gpio_dev, SEDI_POWER_FULL);
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config->irq_config();
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return 0;
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}
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#define GPIO_SEDI_IRQ_FLAGS_SENSE0(n) 0
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#define GPIO_SEDI_IRQ_FLAGS_SENSE1(n) DT_INST_IRQ(n, sense)
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#define GPIO_SEDI_IRQ_FLAGS(n) \
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_CONCAT(GPIO_SEDI_IRQ_FLAGS_SENSE, DT_INST_IRQ_HAS_CELL(n, sense))(n)
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#define GPIO_DEVICE_INIT_SEDI(n) \
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static struct gpio_sedi_data gpio##n##_data; \
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static void gpio_sedi_irq_config_##n(void) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \
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gpio_isr, n, \
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GPIO_SEDI_IRQ_FLAGS(n)); \
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irq_enable(DT_INST_IRQN(n)); \
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}; \
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static const struct gpio_sedi_config gpio##n##_config = { \
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DEVICE_MMIO_ROM_INIT(DT_DRV_INST(n)), \
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.common = { 0xFFFFFFFF }, \
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.device = DT_INST_PROP(n, peripheral_id), \
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.pin_nums = DT_INST_PROP(n, ngpios), \
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.irq_config = gpio_sedi_irq_config_##n, \
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}; \
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PM_DEVICE_DEFINE(gpio_##n, gpio_sedi_pm_action); \
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DEVICE_DT_INST_DEFINE(n, \
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gpio_sedi_init, \
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PM_DEVICE_GET(gpio_##n), \
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&gpio##n##_data, \
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&gpio##n##_config, \
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POST_KERNEL, \
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CONFIG_GPIO_INIT_PRIORITY, \
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&gpio_sedi_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_DEVICE_INIT_SEDI)
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