5a3f53551f
Adding driver for GC9A01A 240x240 based LCD displays. Should be working with GC9C01 as well (untested). Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
102 lines
4.7 KiB
C
102 lines
4.7 KiB
C
/**
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* Copyright (c) 2023 Mr Beam Lasers GmbH.
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* Copyright (c) 2023 Amrith Venkat Kesavamoorthi <amrith@mr-beam.org>
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* Copyright (c) 2023 Martin Kiepfer <mrmarteng@teleschirm.org>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_DISPLAY_GC9X01X_H_
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#define ZEPHYR_DRIVERS_DISPLAY_GC9X01X_H_
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#include <zephyr/sys/util.h>
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/* Command registers */
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#define GC9X01X_CMD_SLPIN 0x10U /* Enter Sleep Mode */
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#define GC9X01X_CMD_SLPOUT 0x11U /* Exit Sleep Mode */
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#define GC9X01X_CMD_PTLON 0x12U /* Partial Mode ON */
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#define GC9X01X_CMD_NORON 0x13U /* Normal Display Mode ON */
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#define GC9X01X_CMD_INVOFF 0x20U /* Display Inversion OFF */
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#define GC9X01X_CMD_INVON 0x21U /* Display Inversion ON */
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#define GC9X01X_CMD_DISPOFF 0x28U /* Display OFF */
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#define GC9X01X_CMD_DISPON 0x29U /* Display ON */
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#define GC9X01X_CMD_COLSET 0x2AU /* Column Address Set */
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#define GC9X01X_CMD_ROWSET 0x2BU /* Row Address Set */
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#define GC9X01X_CMD_MEMWR 0x2CU /* Memory Write */
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#define GC9X01X_CMD_PTLAR 0x30U /* Partial Area */
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#define GC9X01X_CMD_VSCRDEF 0x33U /* Vertical Scrolling Definition */
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#define GC9X01X_CMD_TEOFF 0x34U /* Tearing Effect Line OFF */
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#define GC9X01X_CMD_TEON 0x35U /* Tearing Effect Line ON */
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#define GC9X01X_CMD_MADCTL 0x36U /* Memory Access Control */
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#define GC9X01X_CMD_VSCRSADD 0x37U /* Vertical Scrolling Start Address */
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#define GC9X01X_CMD_PIXFMT 0x3AU /* Pixel Format Set */
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#define GC9X01X_CMD_DFUNCTR 0xB6U /* Display Function Control */
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#define GC9X01X_CMD_PWRCTRL1 0xC1U /* Power Control 1 */
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#define GC9X01X_CMD_PWRCTRL2 0xC3U /* Power Control 2 */
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#define GC9X01X_CMD_PWRCTRL3 0xC4U /* Power Control 3 */
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#define GC9X01X_CMD_PWRCTRL4 0xC9U /* Power Control 4 */
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#define GC9X01X_CMD_READID1 0xDAU /* Read ID 1 */
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#define GC9X01X_CMD_READID2 0xDBU /* Read ID 2 */
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#define GC9X01X_CMD_READID3 0xDCU /* Read ID 3 */
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#define GC9X01X_CMD_GAMMA1 0xF0U /* Gamma1 (negative polarity) */
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#define GC9X01X_CMD_GAMMA2 0xF1U /* Gamma2 */
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#define GC9X01X_CMD_GAMMA3 0xF2U /* Gamma3 (positive polarity) */
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#define GC9X01X_CMD_GAMMA4 0xF3U /* Gamma4 */
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#define GC9X01X_CMD_INREGEN1 0xFEU /* Inter Register Enable 1 */
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#define GC9X01X_CMD_INREGEN2 0xEFU /* Inter Register Enable 2 */
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#define GC9X01X_CMD_FRAMERATE 0xE8U /* Frame Rate Control */
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/* GC9X01X_CMD_MADCTL register fields */
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#define GC9X01X_MADCTL_VAL_MY BIT(7U)
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#define GC9X01X_MADCTL_VAL_MX BIT(6U)
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#define GC9X01X_MADCTL_VAL_MV BIT(5U)
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#define GC9X01X_MADCTL_VAL_ML BIT(4U)
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#define GC9X01X_MADCTL_VAL_BGR BIT(3U)
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#define GC9X01X_MADCTL_VAL_MH BIT(2U)
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/* GC9X01X_CMD_PIXFMT register fields */
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#define GC9X01X_PIXFMT_VAL_RGB_18_BIT 0x60U
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#define GC9X01X_PIXFMT_VAL_RGB_16_BIT 0x50U
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#define GC9X01X_PIXFMT_VAL_MCU_18_BIT 0x06U
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#define GC9X01X_PIXFMT_VAL_MCU_16_BIT 0x05U
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/* Duration to enter/exit sleep mode (see 6.2.3 and 6.4.2 in datasheet) */
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#define GC9X01X_SLEEP_IN_OUT_DURATION_MS 120
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/* GC9X01X registers to be intitialized */
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#define GC9X01X_CMD_PWRCTRL1_LEN 1U
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#define GC9X01X_CMD_PWRCTRL2_LEN 1U
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#define GC9X01X_CMD_PWRCTRL3_LEN 1U
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#define GC9X01X_CMD_PWRCTRL4_LEN 1U
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#define GC9X01X_CMD_GAMMA1_LEN 6U
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#define GC9X01X_CMD_GAMMA2_LEN 6U
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#define GC9X01X_CMD_GAMMA3_LEN 6U
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#define GC9X01X_CMD_GAMMA4_LEN 6U
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#define GC9X01X_CMD_FRAMERATE_LEN 1U
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struct gc9x01x_regs {
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uint8_t pwrctrl1[GC9X01X_CMD_PWRCTRL1_LEN];
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uint8_t pwrctrl2[GC9X01X_CMD_PWRCTRL2_LEN];
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uint8_t pwrctrl3[GC9X01X_CMD_PWRCTRL3_LEN];
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uint8_t pwrctrl4[GC9X01X_CMD_PWRCTRL4_LEN];
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uint8_t gamma1[GC9X01X_CMD_GAMMA1_LEN];
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uint8_t gamma2[GC9X01X_CMD_GAMMA2_LEN];
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uint8_t gamma3[GC9X01X_CMD_GAMMA3_LEN];
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uint8_t gamma4[GC9X01X_CMD_GAMMA4_LEN];
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uint8_t framerate[GC9X01X_CMD_FRAMERATE_LEN];
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};
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#define GC9X01X_REGS_INIT(inst) \
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static const struct gc9x01x_regs gc9x01x_regs_##inst = { \
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.pwrctrl1 = DT_INST_PROP(inst, pwrctrl1), \
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.pwrctrl2 = DT_INST_PROP(inst, pwrctrl2), \
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.pwrctrl3 = DT_INST_PROP(inst, pwrctrl3), \
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.pwrctrl4 = DT_INST_PROP(inst, pwrctrl4), \
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.gamma1 = DT_INST_PROP(inst, gamma1), \
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.gamma2 = DT_INST_PROP(inst, gamma2), \
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.gamma3 = DT_INST_PROP(inst, gamma3), \
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.gamma4 = DT_INST_PROP(inst, gamma4), \
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.framerate = DT_INST_PROP(inst, framerate), \
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};
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#endif /* ZEPHYR_DRIVERS_DISPLAY_GC9X01X_H_ */
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