954901296c
Some workarounds were introduced for intel cavs2.5 platform bring up. It is not general so move them to platform code. Signed-off-by: Rander Wang <rander.wang@intel.com>
24 lines
436 B
C
24 lines
436 B
C
/*
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* Copyright (c) 2016 Cadence Design Systems, Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/toolchain.h>
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#include <zephyr/tracing/tracing.h>
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#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM
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void arch_cpu_idle(void)
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{
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sys_trace_idle();
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__asm__ volatile ("waiti 0");
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}
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#endif
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void arch_cpu_atomic_idle(unsigned int key)
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{
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sys_trace_idle();
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__asm__ volatile ("waiti 0\n\t"
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"wsr.ps %0\n\t"
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"rsync" :: "a"(key));
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}
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