zephyr/arch/xtensa/core
Daniel Leung c1a462e1a5 xtensa: mmu: bail on semantic triple faults
There actually is no triple faults on Xtensa. Once PS.EXCM is
set, it keeps going through double exception vector for any
new exceptions. However, our exception code needs to unmask
PS.EXCM to enable register window operations. So after that,
any new exceptions will go through the kernel or user vectors
depending on PS.UM. If there is continuous faults, it may
keep ping-ponging between double and kernel/user exception
vectors that may never get resolved. Since we stash DEPC
during double exception, and the stashed one is only cleared
once the double exception has been processed, we can use
the stashed DEPC value to detect if the next exception could
be considered a triple fault. If such a case exists, simply
jump to an infinite loop, or quit the simulator, or invoke
debugger.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-06-15 04:44:48 -04:00
..
offsets xtensa: mpu: enable userspace support 2024-03-19 22:17:34 -04:00
startup xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
CMakeLists.txt build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
coredump.c arch: define struct arch_esf and deprecate z_arch_esf_t 2024-06-04 14:02:51 -05:00
cpu_idle.c arch/xtensa: clean up arch_cpu_idle function 2023-11-20 11:14:41 +01:00
crt1.S xtensa: mmu: Simplify initialization 2023-11-21 15:49:48 +01:00
debug_helpers_asm.S build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
elf.c llext: xtensa: add support for in-place relocatable extensions 2024-04-11 11:35:24 -05:00
fatal.c arch: define struct arch_esf and deprecate z_arch_esf_t 2024-06-04 14:02:51 -05:00
gdbstub.c arch: define struct arch_esf and deprecate z_arch_esf_t 2024-06-04 14:02:51 -05:00
gen_vectors.py arch/xtensa: Add automatic vector linkage generation 2024-05-22 13:39:47 -05:00
gen_zsr.py xtensa: make it work with TLB misses during interrupt handling 2024-06-15 04:44:48 -04:00
irq_manage.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
irq_offload.c build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
mem_manage.c xtensa: move to use system cache API support for coherency 2024-02-03 13:42:33 -05:00
mmu.c xtensa: mmu: Fix rasid initial value 2024-03-14 13:24:41 -05:00
mpu.c xtensa: mmu: mpu: add xtensa_mem_kernel_has_access() 2024-06-15 04:44:48 -04:00
ptables.c xtensa: mmu: mpu: add xtensa_mem_kernel_has_access() 2024-06-15 04:44:48 -04:00
README_MMU.txt xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
README_WINDOWS.rst xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
smp.c arch: call arch_smp_init() directly, do not use SYS_INIT 2024-06-12 18:23:54 -04:00
syscall_helper.c xtensa: make arch_user_string_nlen actually work 2024-06-15 04:44:48 -04:00
thread.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
timing.c includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h> 2022-09-05 16:31:47 +02:00
tls.c arch: migrate includes to <zephyr/...> 2022-05-06 19:57:22 +02:00
userspace.S xtensa: make arch_user_string_nlen actually work 2024-06-15 04:44:48 -04:00
vector_handlers.c xtensa: make arch_user_string_nlen actually work 2024-06-15 04:44:48 -04:00
window_vectors.S build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
xcc_stubs.c arch: migrate includes to <zephyr/...> 2022-05-06 19:57:22 +02:00
xtensa_asm2_util.S xtensa: mmu: bail on semantic triple faults 2024-06-15 04:44:48 -04:00
xtensa_backtrace.c xtensa: fix getting exccause during backtrace 2024-06-15 04:44:48 -04:00
xtensa_hifi.S build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
xtensa_intgen.py arch/xtensa: xtensa_intgen.py: Emit handlers for all levels 2024-05-20 20:50:55 -04:00
xtensa_intgen.tmpl xtensa: Interrupt generator script and output for qemu & esp32 2018-02-16 10:44:29 -05:00