.clang-format

@@ -32,8 +32,6 @@ ColumnLimit: 100
 ConstructorInitializerIndentWidth: 8
 ContinuationIndentWidth: 8
 ForEachMacros:
-  - 'ARRAY_FOR_EACH'
-  - 'ARRAY_FOR_EACH_PTR'
   - 'FOR_EACH'
   - 'FOR_EACH_FIXED_ARG'
   - 'FOR_EACH_IDX'

.github/workflows/codecov.yaml

@@ -2,7 +2,7 @@ name: Code Coverage with codecov
 
 on:
   schedule:
-    - cron: '25 06,18 * * *'
+    - cron: '25 06,18 * * 1-5'
 
 concurrency:
   group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
@@ -222,8 +222,9 @@ jobs:
         if: always()
         uses: codecov/codecov-action@v4
         with:
+          directory: ./coverage/reports
           env_vars: OS,PYTHON
           fail_ci_if_error: false
           verbose: true
           token: ${{ secrets.CODECOV_TOKEN }}
-          files: coverage/reports/merged.xml
+          files: merged.xml

.gitignore

@@ -39,7 +39,6 @@ sanity-out*
 twister-out*
 bsim_out
 bsim_bt_out
-myresults.xml
 tests/RunResults.xml
 scripts/grub
 doc/reference/kconfig/*.rst

CMakeLists.txt

@@ -109,15 +109,6 @@ add_library(zephyr_interface INTERFACE)
 # flags that come with zephyr_interface.
 zephyr_library_named(zephyr)
 
-if(CONFIG_LEGACY_GENERATED_INCLUDE_PATH)
-  zephyr_include_directories(${PROJECT_BINARY_DIR}/include/generated/zephyr)
-  message(WARNING "
-    Warning: CONFIG_LEGACY_GENERATED_INCLUDE_PATH is currently enabled by default
-    so that user applications can continue to use the legacy include paths for the
-    generated headers. This Kconfig will be deprecated and eventually removed in
-    the future releases.")
-endif()
-
 zephyr_include_directories(
   include
   ${PROJECT_BINARY_DIR}/include/generated
@@ -550,9 +541,9 @@ if(ZEPHYR_GIT_INDEX)
 endif()
 
 add_custom_command(
-  OUTPUT ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h
+  OUTPUT ${PROJECT_BINARY_DIR}/include/generated/version.h
   COMMAND ${CMAKE_COMMAND} -DZEPHYR_BASE=${ZEPHYR_BASE}
-    -DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h
+    -DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/version.h
     -DVERSION_TYPE=KERNEL
     -DVERSION_FILE=${ZEPHYR_BASE}/VERSION
     -DKERNEL_VERSION_CUSTOMIZATION="$<TARGET_PROPERTY:version_h,KERNEL_VERSION_CUSTOMIZATION>"
@@ -561,13 +552,13 @@ add_custom_command(
   DEPENDS ${ZEPHYR_BASE}/VERSION ${git_dependency}
   COMMAND_EXPAND_LISTS
 )
-add_custom_target(version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h)
+add_custom_target(version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/version.h)
 
 if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
   add_custom_command(
-    OUTPUT ${PROJECT_BINARY_DIR}/include/generated/zephyr/app_version.h
+    OUTPUT ${PROJECT_BINARY_DIR}/include/generated/app_version.h
     COMMAND ${CMAKE_COMMAND} -DZEPHYR_BASE=${ZEPHYR_BASE}
-      -DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/zephyr/app_version.h
+      -DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/app_version.h
       -DVERSION_TYPE=APP
       -DVERSION_FILE=${APPLICATION_SOURCE_DIR}/VERSION
       -DAPP_VERSION_CUSTOMIZATION="$<TARGET_PROPERTY:app_version_h,APP_VERSION_CUSTOMIZATION>"
@@ -576,9 +567,7 @@ if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
     DEPENDS ${APPLICATION_SOURCE_DIR}/VERSION ${git_dependency}
     COMMAND_EXPAND_LISTS
   )
-  add_custom_target(
+  add_custom_target(app_version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/app_version.h)
-    app_version_h
-    DEPENDS ${PROJECT_BINARY_DIR}/include/generated/zephyr/app_version.h)
   add_dependencies(zephyr_interface app_version_h)
 endif()
 
@@ -633,8 +622,8 @@ set(ZEPHYR_CURRENT_CMAKE_DIR)
 get_property(LIBC_LINK_LIBRARIES TARGET zephyr_interface PROPERTY LIBC_LINK_LIBRARIES)
 zephyr_link_libraries(${LIBC_LINK_LIBRARIES})
 
-set(syscall_list_h   ${CMAKE_CURRENT_BINARY_DIR}/include/generated/zephyr/syscall_list.h)
+set(syscall_list_h   ${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscall_list.h)
-set(edk_syscall_list_h   ${CMAKE_CURRENT_BINARY_DIR}/edk/include/generated/zephyr/syscall_list.h)
+set(edk_syscall_list_h   ${CMAKE_CURRENT_BINARY_DIR}/edk/include/generated/syscall_list.h)
 set(syscalls_json    ${CMAKE_CURRENT_BINARY_DIR}/misc/generated/syscalls.json)
 set(struct_tags_json ${CMAKE_CURRENT_BINARY_DIR}/misc/generated/struct_tags.json)
 
@@ -772,7 +761,7 @@ add_custom_target(${SYSCALL_LIST_H_TARGET} DEPENDS ${syscall_list_h} ${picolibc_
 set_property(TARGET ${SYSCALL_LIST_H_TARGET}
              APPEND PROPERTY
              ADDITIONAL_CLEAN_FILES
-             ${CMAKE_CURRENT_BINARY_DIR}/include/generated/zephyr/syscalls
+             ${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscalls
 )
 
 add_custom_target(${PARSE_SYSCALLS_TARGET}
@@ -792,30 +781,19 @@ if(CONFIG_TIMEOUT_64BIT)
   set(SYSCALL_SPLIT_TIMEOUT_ARG --split-type k_timeout_t --split-type k_ticks_t)
 endif()
 
-# percepio/TraceRecorder/kernelports/Zephyr/scripts/tz_parse_syscalls.py hardcodes the path
+add_custom_command(OUTPUT include/generated/syscall_dispatch.c ${syscall_list_h}
-# to the `syscall_list.h`, make a copy of the generated file so that percepio is able to build
+  # Also, some files are written to include/generated/syscalls/
-if(CONFIG_LEGACY_GENERATED_INCLUDE_PATH)
-  set(LEGACY_SYSCALL_LIST_H_ARGS
-    ${CMAKE_COMMAND} -E copy
-    ${syscall_list_h}
-    ${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscall_list.h)
-endif()
-
-add_custom_command(OUTPUT include/generated/zephyr/syscall_dispatch.c ${syscall_list_h}
-  # Also, some files are written to include/generated/zephyr/syscalls/
   COMMAND
   ${PYTHON_EXECUTABLE}
   ${ZEPHYR_BASE}/scripts/build/gen_syscalls.py
   --json-file        ${syscalls_json}                     # Read this file
-  --base-output      include/generated/zephyr/syscalls    # Write to this dir
+  --base-output      include/generated/syscalls           # Write to this dir
-  --syscall-dispatch include/generated/zephyr/syscall_dispatch.c # Write this file
+  --syscall-dispatch include/generated/syscall_dispatch.c # Write this file
-  --syscall-export-llext  include/generated/zephyr/syscall_export_llext.c
+  --syscall-export-llext  include/generated/syscall_export_llext.c
   --syscall-list     ${syscall_list_h}
   $<$<BOOL:${CONFIG_USERSPACE}>:--gen-mrsh-files>
   ${SYSCALL_LONG_REGISTERS_ARG}
   ${SYSCALL_SPLIT_TIMEOUT_ARG}
-  COMMAND
-  ${LEGACY_SYSCALL_LIST_H_ARGS}
   WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
   DEPENDS ${PARSE_SYSCALLS_TARGET}
   )
@@ -823,7 +801,7 @@ add_custom_command(OUTPUT include/generated/zephyr/syscall_dispatch.c ${syscall_
 # This is passed into all calls to the gen_kobject_list.py script.
 set(gen_kobject_list_include_args --include-subsystem-list ${struct_tags_json})
 
-set(DRV_VALIDATION ${PROJECT_BINARY_DIR}/include/generated/zephyr/driver-validation.h)
+set(DRV_VALIDATION ${PROJECT_BINARY_DIR}/include/generated/driver-validation.h)
 add_custom_command(
   OUTPUT ${DRV_VALIDATION}
   COMMAND
@@ -856,7 +834,7 @@ add_dependencies(zephyr_generated_headers
 set(OFFSETS_LIB offsets)
 
 set(OFFSETS_C_PATH ${ARCH_DIR}/${ARCH}/core/offsets/offsets.c)
-set(OFFSETS_H_PATH ${PROJECT_BINARY_DIR}/include/generated/zephyr/offsets.h)
+set(OFFSETS_H_PATH ${PROJECT_BINARY_DIR}/include/generated/offsets.h)
 
 add_library(          ${OFFSETS_LIB} OBJECT ${OFFSETS_C_PATH})
 target_include_directories(${OFFSETS_LIB} PRIVATE
@@ -1219,7 +1197,7 @@ if(CONFIG_USERSPACE)
     PUBLIC $<TARGET_PROPERTY:zephyr_interface,INTERFACE_SYSTEM_INCLUDE_DIRECTORIES>
   )
 
-  set(KOBJECT_LINKER_HEADER_DATA "${PROJECT_BINARY_DIR}/include/generated/zephyr/linker-kobject-prebuilt-data.h")
+  set(KOBJECT_LINKER_HEADER_DATA "${PROJECT_BINARY_DIR}/include/generated/linker-kobject-prebuilt-data.h")
 
   add_custom_command(
     OUTPUT ${KOBJECT_LINKER_HEADER_DATA}
@@ -1227,7 +1205,7 @@ if(CONFIG_USERSPACE)
     ${PYTHON_EXECUTABLE}
     ${ZEPHYR_BASE}/scripts/build/gen_kobject_placeholders.py
     --object $<TARGET_OBJECTS:kobj_prebuilt_hash_output_lib>
-    --outdir ${PROJECT_BINARY_DIR}/include/generated/zephyr
+    --outdir ${PROJECT_BINARY_DIR}/include/generated
     --datapct ${CONFIG_KOBJECT_DATA_AREA_RESERVE_EXTRA_PERCENT}
     --rodata ${CONFIG_KOBJECT_RODATA_AREA_EXTRA_BYTES}
     $<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
@@ -1319,20 +1297,6 @@ if(CONFIG_GEN_ISR_TABLES)
   set_property(GLOBAL APPEND PROPERTY GENERATED_KERNEL_SOURCE_FILES isr_tables.c)
 endif()
 
-if(CONFIG_SYMTAB)
-  add_custom_command(
-    OUTPUT symtab.c
-    COMMAND
-    ${PYTHON_EXECUTABLE}
-    ${ZEPHYR_BASE}/scripts/build/gen_symtab.py
-    -k $<TARGET_FILE:${ZEPHYR_LINK_STAGE_EXECUTABLE}>
-    -o symtab.c
-    DEPENDS ${ZEPHYR_LINK_STAGE_EXECUTABLE}
-    COMMAND_EXPAND_LISTS
-  )
-  set_property(GLOBAL APPEND PROPERTY GENERATED_KERNEL_SOURCE_FILES symtab.c)
-endif()
-
 if(CONFIG_USERSPACE)
   set(KOBJECT_HASH_LIST               kobject_hash.gperf)
   set(KOBJECT_HASH_OUTPUT_SRC_PRE     kobject_hash_preprocessed.c)
@@ -1984,7 +1948,7 @@ if(LOG_DICT_DB_NAME_ARG)
       ${ZEPHYR_BASE}/scripts/logging/dictionary/database_gen.py
       ${KERNEL_ELF_NAME}
       ${LOG_DICT_DB_NAME_ARG}=${LOG_DICT_DB_NAME}
-      --build-header ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h
+      --build-header ${PROJECT_BINARY_DIR}/include/generated/version.h
     WORKING_DIRECTORY ${PROJECT_BINARY_DIR}
     COMMENT "Generating logging dictionary database: ${LOG_DICT_DB_NAME}"
     DEPENDS ${logical_target_for_zephyr_elf}
@@ -2115,13 +2079,13 @@ add_custom_command(
     OUTPUT ${llext_edk_file}
     # Regenerate syscalls in case CONFIG_LLEXT_EDK_USERSPACE_ONLY
     COMMAND ${CMAKE_COMMAND}
-        -E make_directory edk/include/generated/zephyr
+        -E make_directory edk/include/generated
     COMMAND
         ${PYTHON_EXECUTABLE}
         ${ZEPHYR_BASE}/scripts/build/gen_syscalls.py
         --json-file        ${syscalls_json}                     # Read this file
-        --base-output      edk/include/generated/zephyr/syscalls           # Write to this dir
+        --base-output      edk/include/generated/syscalls           # Write to this dir
-        --syscall-dispatch edk/include/generated/zephyr/syscall_dispatch.c # Write this file
+        --syscall-dispatch edk/include/generated/syscall_dispatch.c # Write this file
         --syscall-list     ${edk_syscall_list_h}
         $<$<BOOL:${CONFIG_LLEXT_EDK_USERSPACE_ONLY}>:--userspace-only>
         ${SYSCALL_LONG_REGISTERS_ARG}

CODEOWNERS

@@ -151,6 +151,7 @@
 /drivers/*/*sam4l*                        @nandojve
 /drivers/*/*cc13xx_cc26xx*                @bwitherspoon
 /drivers/*/*gd32*                         @nandojve
+/drivers/*/*litex*                        @mateusz-holenko @kgugala @pgielda
 /drivers/*/*mcux*                         @mmahadevan108 @dleach02
 /drivers/*/*stm32*                        @erwango @ABOSTM @FRASTM
 /drivers/*/*native_posix*                 @aescolar @daor-oti
@@ -210,6 +211,7 @@
 /drivers/entropy/*b91*                    @andy-liu-telink
 /drivers/entropy/*bt_hci*                 @JordanYates
 /drivers/entropy/*rv32m1*                 @dleach02
+/drivers/entropy/*litex*                  @mateusz-holenko @kgugala @pgielda
 /drivers/ethernet/*dwmac*                 @npitre
 /drivers/ethernet/*stm32*                 @Nukersson @lochej
 /drivers/ethernet/*w5500*                 @parthitce
@@ -255,12 +257,13 @@
 /drivers/i2c/i2c_test.c                   @mbolivar-ampere
 /drivers/i2c/*rcar*                       @aaillet
 /drivers/i2c/*kb1200*                     @ene-steven
+/drivers/i2s/*litex*                      @mateusz-holenko @kgugala @pgielda
 /drivers/i2s/i2s_ll_stm32*                @avisconti
 /drivers/i2s/*nrfx*                       @anangl
 /drivers/i3c/i3c_cdns.c                   @XenuIsWatching
 /drivers/ieee802154/                      @rlubos @tbursztyka @jukkar @fgrandel
 /drivers/ieee802154/*b91*                 @andy-liu-telink
-/drivers/ieee802154/ieee802154_nrf5*      @ankuns
+/drivers/ieee802154/ieee802154_nrf5*      @jciupis
 /drivers/ieee802154/ieee802154_rf2xx*     @tbursztyka @nandojve
 /drivers/ieee802154/ieee802154_cc13xx*    @bwitherspoon @cfriedt @vaishnavachath
 /drivers/interrupt_controller/            @dcpleung @nashif
@@ -330,7 +333,6 @@
 /drivers/sensor/qdec_stm32/               @valeriosetti
 /drivers/sensor/rpi_pico_temp/            @soburi
 /drivers/sensor/st*/                      @avisconti
-/drivers/sensor/veaa_x_3/                 @jeppenodgaard @MaureenHelm
 /drivers/sensor/ene_tack_kb1200/          @ene-steven
 /drivers/serial/*b91*                     @andy-liu-telink
 /drivers/serial/uart_altera_jtag.c        @nashif @gohshunjing
@@ -447,6 +449,7 @@
 /dts/riscv/ite/                           @ite
 /dts/riscv/microchip/microchip-miv.dtsi   @galak
 /dts/riscv/openisa/rv32m1*                @dleach02
+/dts/riscv/riscv32-litex-vexriscv.dtsi    @mateusz-holenko @kgugala @pgielda
 /dts/riscv/starfive/                      @rajnesh-kanwal @pfarwsi
 /dts/riscv/andes/andes_v5*                @cwshu @kevinwang821020 @jimmyzhe
 /dts/riscv/niosv/                         @sweeaun
@@ -481,6 +484,8 @@
 /dts/bindings/*/st*                       @erwango
 /dts/bindings/sensor/ams*                 @alexanderwachter
 /dts/bindings/*/sifive*                   @mateusz-holenko @kgugala @pgielda
+/dts/bindings/*/litex*                    @mateusz-holenko @kgugala @pgielda
+/dts/bindings/*/vexriscv*                 @mateusz-holenko @kgugala @pgielda
 /dts/bindings/*/andes*                    @cwshu @kevinwang821020 @jimmyzhe
 /dts/bindings/*/neorv32*                  @henrikbrixandersen
 /dts/bindings/*/*lan91c111*               @sgrrzhf

Kconfig.zephyr

@@ -1048,20 +1048,3 @@ config BOOTLOADER_BOSSA_ADAFRUIT_UF2
 endchoice
 
 endmenu
-
-menu "Compatibility"
-
-config LEGACY_GENERATED_INCLUDE_PATH
-	bool "Legacy include path for generated headers"
-	default y
-	help
-	  Allow applications and libraries to use the Zephyr legacy include
-	  path for the generated headers which does not use the `zephyr/` prefix.
-
-	  From now on, i.e., the preferred way to include the `version.h` header is to
-	  use <zephyr/version.h>, this Kconfig is currently enabled by default so that
-	  user applications won't immediately fail to compile.
-
-	  This Kconfig will be deprecated and eventually removed in the future releases.
-
-endmenu

MAINTAINERS.yml

@@ -114,7 +114,11 @@
 ACPI:
   status: maintained
   maintainers:
+    - jhedberg
     - najumon1980
+  collaborators:
+    - finikorg
+    - tbursztyka
   files:
     - lib/acpi/
     - include/zephyr/acpi/
@@ -646,7 +650,6 @@ Coding Guidelines:
     - nashif
     - carlescufi
     - jfischer-no
-    - simhein
   files:
     - .checkpatch.conf
     - .clang-format
@@ -853,7 +856,6 @@ Documentation:
     - doc/project/
     - doc/releases/
     - doc/security/
-    - doc/safety/
     - README.rst
     - doc/substitutions.txt
     - doc/images/Zephyr-Kite-in-tree.png
@@ -1092,7 +1094,6 @@ Release Notes:
     - include/zephyr/crypto/
     - samples/drivers/crypto/
     - tests/crypto/
-    - doc/services/crypto/
   labels:
     - "area: Crypto / RNG"
   tests:
@@ -1422,7 +1423,7 @@ Release Notes:
     - fgrandel
   collaborators:
     - rlubos
-    - ankuns
+    - jciupis
     - cfriedt
     - jukkar
   files:
@@ -1493,8 +1494,6 @@ Release Notes:
 
 "Drivers: Reset":
   status: odd fixes
-  collaborators:
-    - decsny
   files:
     - drivers/reset/
     - include/zephyr/drivers/reset.h
@@ -1675,6 +1674,10 @@ Release Notes:
   status: maintained
   maintainers:
     - dcpleung
+  collaborators:
+    - jhedberg
+    - finikorg
+    - tbursztyka
   files:
     - drivers/pcie/
     - include/zephyr/drivers/pcie/
@@ -1818,7 +1821,6 @@ Release Notes:
     - yperess
     - tristan-google
     - ubieda
-    - jeppenodgaard
   files:
     - drivers/sensor/
     - include/zephyr/drivers/sensor.h
@@ -2416,6 +2418,7 @@ Mbed TLS:
     - ithinuel
   files:
     - tests/crypto/mbedtls/
+    - doc/services/crypto/
     - tests/benchmarks/mbedtls/
   labels:
     - "area: Crypto / RNG"
@@ -3232,12 +3235,11 @@ SiLabs Platforms:
 Intel Platforms (X86):
   status: maintained
   maintainers:
-    - edersondisouza
+    - jhedberg
   collaborators:
+    - tbursztyka
+    - laurenmurphyx64
     - najumon1980
-    - teburd
-    - dcpleung
-    - ceolin
   files:
     - boards/intel/adl/
     - boards/intel/ehl/
@@ -3246,18 +3248,16 @@ Intel Platforms (X86):
     - soc/intel/atom/
     - soc/intel/lakemont/
     - soc/intel/*_lake/
-    - drivers/timer/Kconfig.x86
-    - drivers/timer/hpet.c
-    - drivers/timer/apic*
   labels:
     - "platform: X86"
 
 Intel Platforms (Xtensa):
   status: maintained
   maintainers:
-    - dcpleung
+    - nashif
   collaborators:
     - andyross
+    - dcpleung
     - lyakh
     - lgirdwood
     - marc-hb
@@ -3267,7 +3267,6 @@ Intel Platforms (Xtensa):
     - softwarecki
     - jxstelter
     - marcinszkudlinski
-    - nashif
   files:
     - boards/intel/adsp/
     - soc/intel/intel_adsp/
@@ -3286,7 +3285,6 @@ Intel Platforms (ISH):
   collaborators:
     - teburd
     - likongintel
-    - nashif
   files:
     - boards/intel/ish/
     - soc/intel/intel_ish/
@@ -3354,7 +3352,6 @@ NXP Platforms (MCU):
     - yvanderv
     - EmilioCBen
     - decsny
-    - butok
   files:
     - boards/nxp/mimxrt*/
     - boards/nxp/frdm*/
@@ -3494,21 +3491,6 @@ nRF Platforms:
   labels:
     - "platform: nRF"
 
-OpenTitan Platforms:
-  status: maintained
-  maintainers:
-    - snematbakhsh
-  files:
-    - boards/lowrisc/opentitan_earlgrey/
-    - drivers/*/*opentitan*
-    - dts/bindings/*/*opentitan*
-    - dts/riscv/lowrisc/*opentitan*
-    - soc/lowrisc/opentitan/
-  labels:
-    - "platform: OpenTitan"
-  description: >-
-    OpenTitan boards, SOCs, dts files and related drivers.
-
 Renesas SmartBond Platforms:
   status: maintained
   maintainers:
@@ -3647,7 +3629,7 @@ ITE Platforms:
     - drivers/sensor/ite/
     - drivers/*/*it8xxx2*.c
     - drivers/*/*_ite_*
-    - dts/bindings/*/ite*
+    - dts/bindings/*/*ite*
     - dts/riscv/ite/
     - soc/ite/
   labels:
@@ -3727,6 +3709,8 @@ Infineon Platforms:
     - drivers/*/*xmc*
     - drivers/sensor/infineon/
     - dts/arm/infineon/
+    - dts/arm/cypress/
+    - soc/cypress/
     - dts/bindings/*/*infineon*
     - soc/infineon/
   labels:
@@ -3735,29 +3719,6 @@ Infineon Platforms:
     Infineon SOCs, dts files and related drivers. Infineon Proto, Pioneer, Eval and Relax
     boards.
 
-LiteX Platforms:
-  status: maintained
-  maintainers:
-    - tgorochowik
-    - kgugala
-    - fkokosinski
-  collaborators:
-    - mateusz-holenko
-    - maass-hamburg
-  files:
-    - boards/enjoydigital/litex_vexriscv/
-    - drivers/*/*litex*
-    - drivers/spi/spi_litespi*
-    - drivers/*/Kconfig.litex
-    - dts/bindings/*/litex*
-    - dts/riscv/riscv32-litex-vexriscv.dtsi
-    - include/zephyr/drivers/*/*litex*
-    - samples/boards/litex/
-    - samples/drivers/*litex/
-    - soc/litex/
-  labels:
-    - "platform: LiteX"
-
 Panasonic Platforms:
   status: maintained
   maintainers:
@@ -3877,7 +3838,7 @@ TF-M Integration:
   labels:
     - "area: TF-M"
   tests:
-    - trusted-firmware-m
+    - tfm
 
 
 "Toolchain Integration":
@@ -4057,6 +4018,9 @@ West:
   status: maintained
   maintainers:
     - najumon1980
+    - jhedberg
+  collaborators:
+    - tbursztyka
   files:
     - modules/acpica/
   labels:
@@ -4231,16 +4195,6 @@ West:
   labels:
     - "area: Storage"
 
-"West project: hal_adi":
-  status: maintained
-  maintainers:
-    - MaureenHelm
-  collaborators:
-    - ozersa
-  files: []
-  labels:
-    - "platform: ADI"
-
 "West project: hal_altera":
   status: odd fixes
   collaborators:
@@ -4405,9 +4359,6 @@ West:
   status: maintained
   maintainers:
     - KhiemNguyenT
-    - ioannis-karachalios
-  collaborators:
-    - blauret
     - andrzej-kaczmarek
   files: []
   labels:
@@ -4840,14 +4791,15 @@ Xtensa arch:
 x86 arch:
   status: maintained
   maintainers:
-    - edersondisouza
+    - jhedberg
   collaborators:
+    - tbursztyka
     - andyross
+    - nashif
     - dcpleung
     - ceolin
     - laurenmurphyx64
     - najumon1980
-    - nashif
   files:
     - arch/x86/
     - include/zephyr/arch/x86/

arch/arc/core/mpu/Kconfig

@@ -35,7 +35,5 @@ config ARC_MPU
 	select GEN_PRIV_STACKS if !(ARC_MPU_VER = 4 || ARC_MPU_VER = 8)
 	select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(ARC_MPU_VER = 4 || ARC_MPU_VER = 8)
 	select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if (ARC_MPU_VER = 4 || ARC_MPU_VER = 8)
-	select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS
-	select MEM_DOMAIN_ISOLATED_STACKS
 	help
 	  Target has ARC MPU

arch/arc/include/offsets_short_arch.h

@@ -7,7 +7,7 @@
 #ifndef ZEPHYR_ARCH_ARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_ARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 /* kernel */
 

arch/arm/core/cortex_a_r/irq_manage.c

@@ -98,7 +98,7 @@ void _arch_isr_direct_pm(void)
 
 	if (_kernel.idle) {
 		_kernel.idle = 0;
-		pm_system_resume();
+		z_pm_save_idle_exit();
 	}
 
 	irq_unlock(key);

arch/arm/core/cortex_m/irq_manage.c

@@ -131,7 +131,7 @@ void _arch_isr_direct_pm(void)
 
 	if (_kernel.idle) {
 		_kernel.idle = 0;
-		pm_system_resume();
+		z_pm_save_idle_exit();
 	}
 
 #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)

arch/arm/core/cortex_m/isr_wrapper.c

@@ -42,7 +42,7 @@ void _isr_wrapper(void)
 	 * idle, this ensures that the calculation and programming of the
 	 * device for the next timer deadline is not interrupted.  For
 	 * non-tickless idle, this ensures that the clearing of the kernel idle
-	 * state is not interrupted.  In each case, pm_system_resume
+	 * state is not interrupted.  In each case, z_pm_save_idle_exit
 	 * is called with interrupts disabled.
 	 */
 
@@ -59,7 +59,7 @@ void _isr_wrapper(void)
 	if (_kernel.idle != 0) {
 		/* clear kernel idle state */
 		_kernel.idle = 0;
-		pm_system_resume();
+		z_pm_save_idle_exit();
 	}
 	/* re-enable interrupts */
 	__enable_irq();

arch/arm/core/mpu/Kconfig

@@ -14,8 +14,6 @@ config ARM_MPU
 	select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_MPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
 	select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
 	select MPU_GAP_FILLING if AARCH32_ARMV8_R
-	select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS
-	select MEM_DOMAIN_ISOLATED_STACKS
 	help
 	  MCU implements Memory Protection Unit.
 

arch/arm/include/offsets_short_arch.h

@@ -7,7 +7,7 @@
 #ifndef ZEPHYR_ARCH_ARM_INCLUDE_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_ARM_INCLUDE_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 /* kernel */
 

arch/arm64/core/fatal.c

@@ -13,7 +13,6 @@
  * exceptions
  */
 
-#include <zephyr/debug/symtab.h>
 #include <zephyr/drivers/pm_cpu_ops.h>
 #include <zephyr/arch/common/exc_handle.h>
 #include <zephyr/kernel.h>
@@ -225,16 +224,8 @@ static void esf_unwind(const z_arch_esf_t *esf)
 	LOG_ERR("");
 	while (fp != NULL) {
 		lr = fp[1];
-#ifdef CONFIG_SYMTAB
-		uint32_t offset = 0;
-		const char *name = symtab_find_symbol_name(lr, &offset);
-
-		LOG_ERR("backtrace %2d: fp: 0x%016llx lr: 0x%016llx [%s+0x%x]",
-			 count++, (uint64_t) fp, lr, name, offset);
-#else
 		LOG_ERR("backtrace %2d: fp: 0x%016llx lr: 0x%016llx",
 			 count++, (uint64_t) fp, lr);
-#endif
 		fp = (uint64_t *) fp[0];
 	}
 	LOG_ERR("");

arch/arm64/core/reset.S

@@ -7,7 +7,7 @@
 #include <zephyr/toolchain.h>
 #include <zephyr/linker/sections.h>
 #include <zephyr/arch/cpu.h>
-#include <zephyr/offsets.h>
+#include <offsets.h>
 #include "boot.h"
 #include "macro_priv.inc"
 

arch/arm64/core/vector_table.S

@@ -10,7 +10,7 @@
 
 #include <zephyr/toolchain.h>
 #include <zephyr/linker/sections.h>
-#include <zephyr/offsets.h>
+#include <offsets.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm64/tpidrro_el0.h>
 #include <offsets_short.h>

arch/arm64/include/offsets_short_arch.h

@@ -7,7 +7,7 @@
 #ifndef ZEPHYR_ARCH_ARM64_INCLUDE_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_ARM64_INCLUDE_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 #define _thread_offset_to_exception_depth \
 	(___thread_t_arch_OFFSET + ___thread_arch_t_exception_depth_OFFSET)

arch/common/CMakeLists.txt

@@ -22,8 +22,6 @@ zephyr_library_sources_ifdef(
   multilevel_irq.c
   )
 
-zephyr_library_sources_ifdef(CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION multilevel_irq_legacy.c)
-
 zephyr_library_sources_ifdef(CONFIG_SHARED_INTERRUPTS shared_irq.c)
 
 if(NOT CONFIG_ARCH_HAS_TIMING_FUNCTIONS AND

arch/common/Kconfig

@@ -15,18 +15,3 @@ config SEMIHOST
 	  https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
 	  This option is compatible with hardware and with QEMU, through the
 	  (automatic) use of the -semihosting-config switch when invoking it.
-
-config LEGACY_MULTI_LEVEL_TABLE_GENERATION
-	bool "Auto generates the multi-level interrupt LUT (deprecated)"
-	default y
-	select DEPRECATED
-	depends on MULTI_LEVEL_INTERRUPTS
-	depends on !PLIC
-	depends on !NXP_IRQSTEER
-	depends on !RV32M1_INTMUX
-	depends on !CAVS_ICTL
-	depends on !DW_ICTL_ACE
-	depends on !DW_ICTL
-	help
-	  A make-shift Kconfig to continue generating the multi-level interrupt LUT
-	  with the legacy way using DT macros.

arch/common/multilevel_irq.c

@@ -15,71 +15,162 @@ BUILD_ASSERT((CONFIG_NUM_2ND_LEVEL_AGGREGATORS * CONFIG_MAX_IRQ_PER_AGGREGATOR)
 		     BIT(CONFIG_2ND_LEVEL_INTERRUPT_BITS),
 	     "L2 bits not enough to cover the number of L2 IRQs");
 
-/**
+/*
- * @brief Get the aggregator that's responsible for the given irq
+ * Insert code if the node_id is an interrupt controller
- *
- * @param irq IRQ number to query
- *
- * @return Aggregator entry, NULL if irq is level 1 or not found.
  */
-static const struct _irq_parent_entry *get_intc_entry_for_irq(unsigned int irq)
+#define Z_IF_DT_IS_INTC(node_id, code)                                                             \
+	IF_ENABLED(DT_NODE_HAS_PROP(node_id, interrupt_controller), (code))
+
+/*
+ * Expands to node_id if its IRQN is equal to `_irq`, nothing otherwise
+ * This only works for `_irq` between 0 & 4095, see `IS_EQ`
+ */
+#define Z_IF_DT_INTC_IRQN_EQ(node_id, _irq) IF_ENABLED(IS_EQ(DT_IRQ(node_id, irq), _irq), (node_id))
+
+/*
+ * Expands to node_id if it's an interrupt controller & its IRQN is `irq`, or nothing otherwise
+ */
+#define Z_DT_INTC_GET_IRQN(node_id, _irq)                                                          \
+	Z_IF_DT_IS_INTC(node_id, Z_IF_DT_INTC_IRQN_EQ(node_id, _irq))
+
+/**
+ * Loop through child of "/soc" and get root interrupt controllers with `_irq` as IRQN,
+ * this assumes only one device has the IRQN
+ * @param _irq irq number
+ * @return node_id(s) that has the `_irq` number, or empty if none of them has the `_irq`
+ */
+#define INTC_DT_IRQN_GET(_irq)                                                                     \
+	DT_FOREACH_CHILD_STATUS_OKAY_VARGS(DT_PATH(soc), Z_DT_INTC_GET_IRQN, _irq)
+
+/* If can't find any matching interrupt controller, fills with `NULL` */
+#define INTC_DEVICE_INIT(node_id) .dev = DEVICE_DT_GET_OR_NULL(node_id),
+
+#define INIT_IRQ_PARENT_OFFSET(d, i, o) { \
+	INTC_DEVICE_INIT(d) \
+	.irq = i, \
+	.offset = o, \
+}
+
+#define IRQ_INDEX_TO_OFFSET(i, base) (base + i * CONFIG_MAX_IRQ_PER_AGGREGATOR)
+
+#define CAT_2ND_LVL_LIST(i, base) \
+	INIT_IRQ_PARENT_OFFSET(INTC_DT_IRQN_GET(CONFIG_2ND_LVL_INTR_0##i##_OFFSET), \
+			       CONFIG_2ND_LVL_INTR_0##i##_OFFSET, IRQ_INDEX_TO_OFFSET(i, base))
+const struct _irq_parent_entry _lvl2_irq_list[CONFIG_NUM_2ND_LEVEL_AGGREGATORS]
+	= { LISTIFY(CONFIG_NUM_2ND_LEVEL_AGGREGATORS, CAT_2ND_LVL_LIST, (,),
+		CONFIG_2ND_LVL_ISR_TBL_OFFSET) };
+
+#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
+
+BUILD_ASSERT((CONFIG_NUM_3RD_LEVEL_AGGREGATORS * CONFIG_MAX_IRQ_PER_AGGREGATOR) <=
+		     BIT(CONFIG_3RD_LEVEL_INTERRUPT_BITS),
+	     "L3 bits not enough to cover the number of L3 IRQs");
+
+#define CAT_3RD_LVL_LIST(i, base) \
+	INIT_IRQ_PARENT_OFFSET(INTC_DT_IRQN_GET(CONFIG_3RD_LVL_INTR_0##i##_OFFSET), \
+			       CONFIG_3RD_LVL_INTR_0##i##_OFFSET, IRQ_INDEX_TO_OFFSET(i, base))
+
+const struct _irq_parent_entry _lvl3_irq_list[CONFIG_NUM_3RD_LEVEL_AGGREGATORS]
+	 = { LISTIFY(CONFIG_NUM_3RD_LEVEL_AGGREGATORS, CAT_3RD_LVL_LIST, (,),
+		CONFIG_3RD_LVL_ISR_TBL_OFFSET) };
+
+#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
+
+static const struct _irq_parent_entry *get_parent_entry(unsigned int parent_irq,
+				      const struct _irq_parent_entry list[],
+				      unsigned int length)
 {
-	const unsigned int level = irq_get_level(irq);
+	unsigned int i;
+	const struct _irq_parent_entry *entry = NULL;
 
-	/* 1st level aggregator is not registered */
+	for (i = 0U; i < length; ++i) {
-	if (level == 1) {
+		if (list[i].irq == parent_irq) {
-		return NULL;
+			entry = &list[i];
-	}
+			break;
-
-	const unsigned int intc_irq = irq_get_intc_irq(irq);
-
-	/* Find an aggregator entry that matches the level & intc_irq */
-	STRUCT_SECTION_FOREACH_ALTERNATE(intc_table, _irq_parent_entry, intc) {
-		if ((intc->level == level) && (intc->irq == intc_irq)) {
-			return intc;
 		}
 	}
 
-	return NULL;
+	__ASSERT(i != length, "Invalid argument: %i", parent_irq);
+
+	return entry;
 }
 
 const struct device *z_get_sw_isr_device_from_irq(unsigned int irq)
 {
-	const struct _irq_parent_entry *intc = get_intc_entry_for_irq(irq);
+	const struct device *dev = NULL;
+	unsigned int level, parent_irq;
+	const struct _irq_parent_entry *entry = NULL;
 
-	__ASSERT(intc != NULL, "can't find an aggregator to handle irq(%X)", irq);
+	level = irq_get_level(irq);
 
-	return intc != NULL ? intc->dev : NULL;
+	if (level == 2U) {
+		parent_irq = irq_parent_level_2(irq);
+		entry = get_parent_entry(parent_irq,
+					 _lvl2_irq_list,
+					 CONFIG_NUM_2ND_LEVEL_AGGREGATORS);
+	}
+#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
+	else if (level == 3U) {
+		parent_irq = irq_parent_level_3(irq);
+		entry = get_parent_entry(parent_irq,
+					 _lvl3_irq_list,
+					 CONFIG_NUM_3RD_LEVEL_AGGREGATORS);
+	}
+#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
+	dev = entry != NULL ? entry->dev : NULL;
+
+	return dev;
 }
 
 unsigned int z_get_sw_isr_irq_from_device(const struct device *dev)
 {
-	/* Get the IRQN for the aggregator */
+	for (size_t i = 0U; i < CONFIG_NUM_2ND_LEVEL_AGGREGATORS; ++i) {
-	STRUCT_SECTION_FOREACH_ALTERNATE(intc_table, _irq_parent_entry, intc) {
+		if (_lvl2_irq_list[i].dev == dev) {
-		if (intc->dev == dev) {
+			return _lvl2_irq_list[i].irq;
-			return intc->irq;
 		}
 	}
 
-	__ASSERT(false, "dev(%p) not found", dev);
+#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
+	for (size_t i = 0U; i < CONFIG_NUM_3RD_LEVEL_AGGREGATORS; ++i) {
+		if (_lvl3_irq_list[i].dev == dev) {
+			return _lvl3_irq_list[i].irq;
+		}
+	}
+#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
 
 	return 0;
 }
 
 unsigned int z_get_sw_isr_table_idx(unsigned int irq)
 {
-	unsigned int table_idx, local_irq;
+	unsigned int table_idx, level, parent_irq, local_irq, parent_offset;
-	const struct _irq_parent_entry *intc = get_intc_entry_for_irq(irq);
+	const struct _irq_parent_entry *entry = NULL;
-	const unsigned int level = irq_get_level(irq);
 
-	if (intc != NULL) {
+	level = irq_get_level(irq);
-		local_irq = irq_from_level(irq, level);
+
+	if (level == 2U) {
+		local_irq = irq_from_level_2(irq);
 		__ASSERT_NO_MSG(local_irq < CONFIG_MAX_IRQ_PER_AGGREGATOR);
-
+		parent_irq = irq_parent_level_2(irq);
-		table_idx = intc->offset + local_irq;
+		entry = get_parent_entry(parent_irq,
-	} else {
+					 _lvl2_irq_list,
-		/* irq level must be 1 if no intc entry */
+					 CONFIG_NUM_2ND_LEVEL_AGGREGATORS);
-		__ASSERT(level == 1, "can't find an aggregator to handle irq(%X)", irq);
+		parent_offset = entry != NULL ? entry->offset : 0U;
+		table_idx = parent_offset + local_irq;
+	}
+#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
+	else if (level == 3U) {
+		local_irq = irq_from_level_3(irq);
+		__ASSERT_NO_MSG(local_irq < CONFIG_MAX_IRQ_PER_AGGREGATOR);
+		parent_irq = irq_parent_level_3(irq);
+		entry = get_parent_entry(parent_irq,
+					 _lvl3_irq_list,
+					 CONFIG_NUM_3RD_LEVEL_AGGREGATORS);
+		parent_offset = entry != NULL ? entry->offset : 0U;
+		table_idx = parent_offset + local_irq;
+	}
+#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
+	else {
 		table_idx = irq;
 	}
 

arch/common/multilevel_irq_legacy.c

@@ -1,72 +0,0 @@
-/*
- * Copyright (c) 2018 Intel Corporation.
- * Copyright (c) 2024 Meta.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <zephyr/sw_isr_table.h>
-#include <zephyr/sys/util.h>
-
-/**
- * @file
- * @brief This file houses the deprecated legacy macros-generated multi-level interrupt lookup
- * table code, compiled when `CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION` is enabled.
- */
-
-/*
- * Insert code if the node_id is an interrupt controller
- */
-#define Z_IF_DT_IS_INTC(node_id, code)                                                             \
-	IF_ENABLED(DT_NODE_HAS_PROP(node_id, interrupt_controller), (code))
-
-/*
- * Expands to node_id if its IRQN is equal to `_irq`, nothing otherwise
- * This only works for `_irq` between 0 & 4095, see `IS_EQ`
- */
-#define Z_IF_DT_INTC_IRQN_EQ(node_id, _irq) IF_ENABLED(IS_EQ(DT_IRQ(node_id, irq), _irq), (node_id))
-
-/*
- * Expands to node_id if it's an interrupt controller & its IRQN is `irq`, or nothing otherwise
- */
-#define Z_DT_INTC_GET_IRQN(node_id, _irq)                                                          \
-	Z_IF_DT_IS_INTC(node_id, Z_IF_DT_INTC_IRQN_EQ(node_id, _irq))
-
-/**
- * Loop through child of "/soc" and get root interrupt controllers with `_irq` as IRQN,
- * this assumes only one device has the IRQN
- * @param _irq irq number
- * @return node_id(s) that has the `_irq` number, or empty if none of them has the `_irq`
- */
-#define INTC_DT_IRQN_GET(_irq)                                                                     \
-	DT_FOREACH_CHILD_STATUS_OKAY_VARGS(DT_PATH(soc), Z_DT_INTC_GET_IRQN, _irq)
-
-#define INIT_IRQ_PARENT_OFFSET_2ND(n, d, i, o)                                                     \
-	IRQ_PARENT_ENTRY_DEFINE(intc_l2_##n, DEVICE_DT_GET_OR_NULL(d), i, o, 2)
-
-#define IRQ_INDEX_TO_OFFSET(i, base) (base + i * CONFIG_MAX_IRQ_PER_AGGREGATOR)
-
-#define CAT_2ND_LVL_LIST(i, base)                                                                  \
-	INIT_IRQ_PARENT_OFFSET_2ND(i, INTC_DT_IRQN_GET(CONFIG_2ND_LVL_INTR_0##i##_OFFSET),         \
-				   CONFIG_2ND_LVL_INTR_0##i##_OFFSET,                              \
-				   IRQ_INDEX_TO_OFFSET(i, base))
-
-LISTIFY(CONFIG_NUM_2ND_LEVEL_AGGREGATORS, CAT_2ND_LVL_LIST, (;), CONFIG_2ND_LVL_ISR_TBL_OFFSET);
-
-#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
-
-BUILD_ASSERT((CONFIG_NUM_3RD_LEVEL_AGGREGATORS * CONFIG_MAX_IRQ_PER_AGGREGATOR) <=
-		     BIT(CONFIG_3RD_LEVEL_INTERRUPT_BITS),
-	     "L3 bits not enough to cover the number of L3 IRQs");
-
-#define INIT_IRQ_PARENT_OFFSET_3RD(n, d, i, o)                                                     \
-	IRQ_PARENT_ENTRY_DEFINE(intc_l3_##n, DEVICE_DT_GET_OR_NULL(d), i, o, 3)
-
-#define CAT_3RD_LVL_LIST(i, base)                                                                  \
-	INIT_IRQ_PARENT_OFFSET_3RD(i, INTC_DT_IRQN_GET(CONFIG_3RD_LVL_INTR_0##i##_OFFSET),         \
-				   CONFIG_3RD_LVL_INTR_0##i##_OFFSET,                              \
-				   IRQ_INDEX_TO_OFFSET(i, base))
-
-LISTIFY(CONFIG_NUM_3RD_LEVEL_AGGREGATORS, CAT_3RD_LVL_LIST, (;), CONFIG_3RD_LVL_ISR_TBL_OFFSET);
-
-#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */

arch/mips/include/offsets_short_arch.h

@@ -9,7 +9,7 @@
 #ifndef ZEPHYR_ARCH_MIPS_INCLUDE_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_MIPS_INCLUDE_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 #define _thread_offset_to_sp \
 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_sp_OFFSET)

arch/nios2/include/offsets_short_arch.h

@@ -7,7 +7,7 @@
 #ifndef ZEPHYR_ARCH_NIOS2_INCLUDE_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_NIOS2_INCLUDE_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 /* kernel */
 

arch/posix/core/swap.c

@@ -112,7 +112,7 @@ void posix_irq_check_idle_exit(void)
 {
 	if (_kernel.idle) {
 		_kernel.idle = 0;
-		pm_system_resume();
+		z_pm_save_idle_exit();
 	}
 }
 #endif

arch/posix/include/offsets_short_arch.h

@@ -7,7 +7,7 @@
 #ifndef ZEPHYR_ARCH_POSIX_INCLUDE_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_POSIX_INCLUDE_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 /* kernel */
 

arch/riscv/Kconfig

@@ -50,6 +50,7 @@ config RISCV_ENABLE_FRAME_POINTER
 config RISCV_EXCEPTION_STACK_TRACE
 	bool
 	default y
+	depends on RISCV_ENABLE_FRAME_POINTER
 	depends on EXCEPTION_STACK_TRACE
 	imply THREAD_STACK_INFO
 	help
@@ -266,8 +267,6 @@ config RISCV_PMP
 	select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE
 	select ARCH_MEM_DOMAIN_DATA if USERSPACE
 	select THREAD_LOCAL_STORAGE if USERSPACE
-	select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS
-	select MEM_DOMAIN_ISOLATED_STACKS
 	help
 	  MCU implements Physical Memory Protection.
 

arch/riscv/core/CMakeLists.txt

@@ -25,5 +25,4 @@ zephyr_library_sources_ifdef(CONFIG_RISCV_PMP pmp.c pmp.S)
 zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)
 zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
 zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)
-zephyr_library_sources_ifdef(CONFIG_RISCV_EXCEPTION_STACK_TRACE stacktrace.c)
 zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors vector_table.ld)

arch/riscv/core/fatal.c

@@ -4,7 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <zephyr/debug/symtab.h>
 #include <zephyr/kernel.h>
 #include <zephyr/kernel_structs.h>
 #include <kernel_internal.h>
@@ -29,30 +28,83 @@ static const struct z_exc_handle exceptions[] = {
  #define NO_REG "                "
 #endif
 
-/* Stack trace function */
+#ifdef CONFIG_RISCV_EXCEPTION_STACK_TRACE
-void z_riscv_unwind_stack(const z_arch_esf_t *esf);
+#define MAX_STACK_FRAMES 8
 
-uintptr_t z_riscv_get_sp_before_exc(const z_arch_esf_t *esf)
+struct stackframe {
+	uintptr_t fp;
+	uintptr_t ra;
+};
+
+static bool in_stack_bound(uintptr_t addr)
 {
-	/*
+#ifdef CONFIG_THREAD_STACK_INFO
-	 * Kernel stack pointer prior this exception i.e. before
+	uintptr_t start, end;
-	 * storing the exception stack frame.
-	 */
-	uintptr_t sp = (uintptr_t)esf + sizeof(z_arch_esf_t);
 
-#ifdef CONFIG_USERSPACE
+	if (_current == NULL || arch_is_in_isr()) {
-	if ((esf->mstatus & MSTATUS_MPP) == PRV_U) {
+		/* We were servicing an interrupt */
-		/*
+		int cpu_id;
-		 * Exception happened in user space:
+
-		 * consider the saved user stack instead.
+#ifdef CONFIG_SMP
-		 */
+		cpu_id = arch_curr_cpu()->id;
-		sp = esf->sp;
+#else
-	}
+		cpu_id = 0;
 #endif
 
-	return sp;
+		start = (uintptr_t)K_KERNEL_STACK_BUFFER(z_interrupt_stacks[cpu_id]);
+		end = start + CONFIG_ISR_STACK_SIZE;
+#ifdef CONFIG_USERSPACE
+		/* TODO: handle user threads */
+#endif
+	} else {
+		start = _current->stack_info.start;
+		end = Z_STACK_PTR_ALIGN(_current->stack_info.start + _current->stack_info.size);
+	}
+
+	return (addr >= start) && (addr < end);
+#else
+	ARG_UNUSED(addr);
+	return true;
+#endif /* CONFIG_THREAD_STACK_INFO */
 }
 
+static inline bool in_text_region(uintptr_t addr)
+{
+	extern uintptr_t __text_region_start, __text_region_end;
+
+	return (addr >= (uintptr_t)&__text_region_start) && (addr < (uintptr_t)&__text_region_end);
+}
+
+static void unwind_stack(const z_arch_esf_t *esf)
+{
+	uintptr_t fp = esf->s0;
+	uintptr_t ra;
+	struct stackframe *frame;
+
+	if (esf == NULL) {
+		return;
+	}
+
+	LOG_ERR("call trace:");
+
+	for (int i = 0; (i < MAX_STACK_FRAMES) && (fp != 0U) && in_stack_bound(fp);) {
+		frame = (struct stackframe *)fp - 1;
+		ra = frame->ra;
+		if (in_text_region(ra)) {
+			LOG_ERR("     %2d: fp: " PR_REG "   ra: " PR_REG, i, fp, ra);
+			/*
+			 * Increment the iterator only if `ra` is within the text region to get the
+			 * most out of it
+			 */
+			i++;
+		}
+		fp = frame->fp;
+	}
+
+	LOG_ERR("");
+}
+#endif /* CONFIG_RISCV_EXCEPTION_STACK_TRACE */
+
 FUNC_NORETURN void z_riscv_fatal_error(unsigned int reason,
 				       const z_arch_esf_t *esf)
 {
@@ -64,6 +116,12 @@ FUNC_NORETURN void z_riscv_fatal_error_csf(unsigned int reason, const z_arch_esf
 {
 #ifdef CONFIG_EXCEPTION_DEBUG
 	if (esf != NULL) {
+		/*
+		 * Kernel stack pointer prior this exception i.e. before
+		 * storing the exception stack frame.
+		 */
+		uintptr_t sp = (uintptr_t)esf + sizeof(z_arch_esf_t);
+
 		LOG_ERR("     a0: " PR_REG "    t0: " PR_REG, esf->a0, esf->t0);
 		LOG_ERR("     a1: " PR_REG "    t1: " PR_REG, esf->a1, esf->t1);
 		LOG_ERR("     a2: " PR_REG "    t2: " PR_REG, esf->a2, esf->t2);
@@ -78,16 +136,18 @@ FUNC_NORETURN void z_riscv_fatal_error_csf(unsigned int reason, const z_arch_esf
 		LOG_ERR("     a6: " PR_REG "    t6: " PR_REG, esf->a6, esf->t6);
 		LOG_ERR("     a7: " PR_REG, esf->a7);
 #endif /* CONFIG_RISCV_ISA_RV32E */
-		LOG_ERR("     sp: " PR_REG, z_riscv_get_sp_before_exc(esf));
+#ifdef CONFIG_USERSPACE
-		LOG_ERR("     ra: " PR_REG, esf->ra);
+		if ((esf->mstatus & MSTATUS_MPP) == 0) {
-#ifndef CONFIG_SYMTAB
+			/*
-		LOG_ERR("   mepc: " PR_REG, esf->mepc);
+			 * Exception happened in user space:
-#else
+			 * consider the saved user stack instead.
-		uint32_t offset = 0;
+			 */
-		const char *name = symtab_find_symbol_name(esf->mepc, &offset);
+			sp = esf->sp;
-
+		}
-		LOG_ERR("   mepc: " PR_REG " [%s+0x%x]", esf->mepc, name, offset);
 #endif
+		LOG_ERR("     sp: " PR_REG, sp);
+		LOG_ERR("     ra: " PR_REG, esf->ra);
+		LOG_ERR("   mepc: " PR_REG, esf->mepc);
 		LOG_ERR("mstatus: " PR_REG, esf->mstatus);
 		LOG_ERR("");
 	}
@@ -107,9 +167,9 @@ FUNC_NORETURN void z_riscv_fatal_error_csf(unsigned int reason, const z_arch_esf
 		LOG_ERR("");
 	}
 
-	if (IS_ENABLED(CONFIG_RISCV_EXCEPTION_STACK_TRACE) && (esf != NULL)) {
+#ifdef CONFIG_RISCV_EXCEPTION_STACK_TRACE
-		z_riscv_unwind_stack(esf);
+		unwind_stack(esf);
-	}
+#endif /* CONFIG_RISCV_EXCEPTION_STACK_TRACE */
 
 #endif /* CONFIG_EXCEPTION_DEBUG */
 	z_fatal_error(reason, esf);
@@ -263,6 +323,6 @@ static void z_vrfy_user_fault(unsigned int reason)
 	z_impl_user_fault(reason);
 }
 
-#include <zephyr/syscalls/user_fault_mrsh.c>
+#include <syscalls/user_fault_mrsh.c>
 
 #endif /* CONFIG_USERSPACE */

arch/riscv/core/fpu.S

@@ -7,7 +7,7 @@
 
 #include <zephyr/toolchain.h>
 #include <zephyr/linker/sections.h>
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 #ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION
 #define LOAD	fld

arch/riscv/core/irq_manage.c

@@ -9,7 +9,6 @@
 #include <zephyr/logging/log.h>
 #include <zephyr/arch/riscv/csr.h>
 #include <zephyr/irq_multilevel.h>
-#include <zephyr/sw_isr_table.h>
 
 #ifdef CONFIG_RISCV_HAS_PLIC
 #include <zephyr/drivers/interrupt_controller/riscv_plic.h>
@@ -54,17 +53,4 @@ int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
 #endif
 	return irq;
 }
-
-#ifdef CONFIG_SHARED_INTERRUPTS
-int arch_irq_disconnect_dynamic(unsigned int irq, unsigned int priority,
-				void (*routine)(const void *parameter), const void *parameter,
-				uint32_t flags)
-{
-	ARG_UNUSED(priority);
-	ARG_UNUSED(flags);
-
-	return z_isr_uninstall(irq + CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET, routine,
-			       parameter);
-}
-#endif /* CONFIG_SHARED_INTERRUPTS */
 #endif /* CONFIG_DYNAMIC_INTERRUPTS */

arch/riscv/core/reset.S

@@ -8,7 +8,7 @@
 #include <zephyr/toolchain.h>
 #include <zephyr/linker/sections.h>
 #include <zephyr/arch/cpu.h>
-#include <zephyr/offsets.h>
+#include <offsets.h>
 #include "asm_macros.inc"
 
 /* exports */

arch/riscv/core/stacktrace.c

@@ -1,146 +0,0 @@
-/*
- * Copyright (c) 2024 Meta Platforms
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <zephyr/debug/symtab.h>
-#include <zephyr/kernel.h>
-#include <zephyr/kernel_structs.h>
-#include <kernel_internal.h>
-#include <zephyr/logging/log.h>
-
-LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
-
-uintptr_t z_riscv_get_sp_before_exc(const z_arch_esf_t *esf);
-
-#if __riscv_xlen == 32
- #define PR_REG "%08" PRIxPTR
-#elif __riscv_xlen == 64
- #define PR_REG "%016" PRIxPTR
-#endif
-
-#define MAX_STACK_FRAMES CONFIG_EXCEPTION_STACK_TRACE_MAX_FRAMES
-
-struct stackframe {
-	uintptr_t fp;
-	uintptr_t ra;
-};
-
-#ifdef CONFIG_RISCV_ENABLE_FRAME_POINTER
-#define SFP_FMT "fp: "
-#else
-#define SFP_FMT "sp: "
-#endif
-
-#ifdef CONFIG_EXCEPTION_STACK_TRACE_SYMTAB
-#define LOG_STACK_TRACE(idx, sfp, ra, name, offset)                                                \
-	LOG_ERR("     %2d: " SFP_FMT PR_REG "   ra: " PR_REG " [%s+0x%x]", idx, sfp, ra, name,     \
-		offset)
-#else
-#define LOG_STACK_TRACE(idx, sfp, ra, name, offset)                                                \
-	LOG_ERR("     %2d: " SFP_FMT PR_REG "   ra: " PR_REG, idx, sfp, ra)
-#endif
-
-static bool in_stack_bound(uintptr_t addr, const z_arch_esf_t *esf)
-{
-#ifdef CONFIG_THREAD_STACK_INFO
-	uintptr_t start, end;
-
-	if (_current == NULL || arch_is_in_isr()) {
-		/* We were servicing an interrupt */
-		uint8_t cpu_id = IS_ENABLED(CONFIG_SMP) ? arch_curr_cpu()->id : 0U;
-
-		start = (uintptr_t)K_KERNEL_STACK_BUFFER(z_interrupt_stacks[cpu_id]);
-		end = start + CONFIG_ISR_STACK_SIZE;
-#ifdef CONFIG_USERSPACE
-	} else if (((esf->mstatus & MSTATUS_MPP) == PRV_U) &&
-		   ((_current->base.user_options & K_USER) != 0)) {
-		/* See: zephyr/include/zephyr/arch/riscv/arch.h */
-		if (IS_ENABLED(CONFIG_PMP_POWER_OF_TWO_ALIGNMENT)) {
-			start = _current->arch.priv_stack_start - CONFIG_PRIVILEGED_STACK_SIZE;
-			end = _current->arch.priv_stack_start;
-		} else {
-			start = _current->stack_info.start - CONFIG_PRIVILEGED_STACK_SIZE;
-			end = _current->stack_info.start;
-		}
-#endif /* CONFIG_USERSPACE */
-	} else {
-		start = _current->stack_info.start;
-		end = Z_STACK_PTR_ALIGN(_current->stack_info.start + _current->stack_info.size);
-	}
-
-	return (addr >= start) && (addr < end);
-#else
-	ARG_UNUSED(addr);
-	ARG_UNUSED(esf);
-	return true;
-#endif /* CONFIG_THREAD_STACK_INFO */
-}
-
-static inline bool in_text_region(uintptr_t addr)
-{
-	extern uintptr_t __text_region_start, __text_region_end;
-
-	return (addr >= (uintptr_t)&__text_region_start) && (addr < (uintptr_t)&__text_region_end);
-}
-
-#ifdef CONFIG_RISCV_ENABLE_FRAME_POINTER
-void z_riscv_unwind_stack(const z_arch_esf_t *esf)
-{
-	uintptr_t fp = esf->s0;
-	uintptr_t ra;
-	struct stackframe *frame;
-
-	LOG_ERR("call trace:");
-
-	for (int i = 0; (i < MAX_STACK_FRAMES) && (fp != 0U) && in_stack_bound(fp, esf);) {
-		frame = (struct stackframe *)fp - 1;
-		ra = frame->ra;
-		if (in_text_region(ra)) {
-#ifdef CONFIG_EXCEPTION_STACK_TRACE_SYMTAB
-			uint32_t offset = 0;
-			const char *name = symtab_find_symbol_name(ra, &offset);
-#endif
-			LOG_STACK_TRACE(i, fp, ra, name, offset);
-			/*
-			 * Increment the iterator only if `ra` is within the text region to get the
-			 * most out of it
-			 */
-			i++;
-		}
-		fp = frame->fp;
-	}
-
-	LOG_ERR("");
-}
-#else /* !CONFIG_RISCV_ENABLE_FRAME_POINTER */
-void z_riscv_unwind_stack(const z_arch_esf_t *esf)
-{
-	uintptr_t sp = z_riscv_get_sp_before_exc(esf);
-	uintptr_t ra;
-	uintptr_t *ksp = (uintptr_t *)sp;
-
-	LOG_ERR("call trace:");
-
-	for (int i = 0; (i < MAX_STACK_FRAMES) && ((uintptr_t)ksp != 0U) &&
-			in_stack_bound((uintptr_t)ksp, esf);
-	     ksp++) {
-		ra = *ksp;
-		if (in_text_region(ra)) {
-#ifdef CONFIG_EXCEPTION_STACK_TRACE_SYMTAB
-			uint32_t offset = 0;
-			const char *name = symtab_find_symbol_name(ra, &offset);
-#endif
-			LOG_STACK_TRACE(i, (uintptr_t)ksp, ra, name, offset);
-			/*
-			 * Increment the iterator only if `ra` is within the text region to get the
-			 * most out of it
-			 */
-			i++;
-		}
-	}
-
-	LOG_ERR("");
-}
-#endif /* CONFIG_RISCV_ENABLE_FRAME_POINTER */

arch/riscv/include/offsets_short_arch.h

@@ -7,7 +7,7 @@
 #ifndef ZEPHYR_ARCH_RISCV_INCLUDE_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_RISCV_INCLUDE_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 #define _thread_offset_to_sp \
 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_sp_OFFSET)

arch/sparc/include/offsets_short_arch.h

@@ -7,7 +7,7 @@
 #ifndef ZEPHYR_ARCH_SPARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_SPARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 #define _thread_offset_to_y \
 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_y_OFFSET)

arch/x86/core/early_serial.c

@@ -25,8 +25,8 @@
  * together.
  */
 static mm_reg_t mmio;
-#define IN(reg)       (sys_read32(mmio + (reg) * 4) & 0xff)
+#define IN(reg)       (sys_read32(mmio + reg * 4) & 0xff)
-#define OUT(reg, val) sys_write32((val) & 0xff, mmio + (reg) * 4)
+#define OUT(reg, val) sys_write32((val) & 0xff, mmio + reg * 4)
 #elif defined(X86_SOC_EARLY_SERIAL_MMIO8_ADDR)
 /* Still other devices use a MMIO region containing packed byte
  * registers

arch/x86/core/fatal.c

@@ -140,7 +140,7 @@ struct stack_frame {
 #endif
 };
 
-#define MAX_STACK_FRAMES CONFIG_EXCEPTION_STACK_TRACE_MAX_FRAMES
+#define MAX_STACK_FRAMES 8
 
 __pinned_func
 static void unwind_stack(uintptr_t base_ptr, uint16_t cs)

arch/x86/core/x86_mmu.c

@@ -1169,8 +1169,8 @@ static int range_map(void *virt, uintptr_t phys, size_t size,
 {
 	int ret = 0, ret2;
 
-	LOG_DBG("%s: 0x%" PRIxPTR " -> %p (%zu) flags " PRI_ENTRY " mask "
+	LOG_DBG("%s: %p -> %p (%zu) flags " PRI_ENTRY " mask "
-		PRI_ENTRY " opt 0x%x", __func__, phys, virt, size,
+		PRI_ENTRY " opt 0x%x", __func__, (void *)phys, virt, size,
 		entry_flags, mask, options);
 
 #ifdef CONFIG_X86_64
@@ -1781,8 +1781,8 @@ static inline int apply_region(pentry_t *ptables, void *start,
 __pinned_func
 static void set_stack_perms(struct k_thread *thread, pentry_t *ptables)
 {
-	LOG_DBG("update stack for thread %p's ptables at %p: 0x%" PRIxPTR " (size %zu)",
+	LOG_DBG("update stack for thread %p's ptables at %p: %p (size %zu)",
-		thread, ptables, thread->stack_info.start,
+		thread, ptables, (void *)thread->stack_info.start,
 		thread->stack_info.size);
 	apply_region(ptables, (void *)thread->stack_info.start,
 		     thread->stack_info.size,
@@ -1929,8 +1929,8 @@ int arch_mem_domain_thread_add(struct k_thread *thread)
 	}
 
 	thread->arch.ptables = z_mem_phys_addr(domain->arch.ptables);
-	LOG_DBG("set thread %p page tables to 0x%" PRIxPTR, thread,
+	LOG_DBG("set thread %p page tables to %p", thread,
-		thread->arch.ptables);
+		(void *)thread->arch.ptables);
 
 	/* Check if we're doing a migration from a different memory domain
 	 * and have to remove permissions from its old domain.

arch/x86/include/ia32/offsets_short_arch.h

@@ -7,7 +7,7 @@
 #ifndef ZEPHYR_ARCH_X86_INCLUDE_IA32_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_X86_INCLUDE_IA32_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 /* kernel */
 

arch/x86/include/intel64/offsets_short_arch.h

@@ -6,7 +6,7 @@
 #ifndef ZEPHYR_ARCH_X86_INCLUDE_INTEL64_OFFSETS_SHORT_ARCH_H_
 #define ZEPHYR_ARCH_X86_INCLUDE_INTEL64_OFFSETS_SHORT_ARCH_H_
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 #define _thread_offset_to_rsp \
 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_rsp_OFFSET)

arch/xtensa/Kconfig

@@ -22,16 +22,6 @@ config XTENSA_RESET_VECTOR
 	  This is always needed for the simulator. Real boards may already
 	  implement this in boot ROM.
 
-config XTENSA_GEN_HANDLERS
-	bool "Automatically generate interrupt handlers"
-	default n
-	help
-	  When set, an "xtensa_handlers.h" file is generated
-	  containing definitions for the interrupt entry code of the
-	  target Xtensa core, based automatically on the details in
-	  the core-isa.h file.  This replaces the previous scheme
-	  where a _soc_inthandlers.h file would be generated offline.
-
 config XTENSA_USE_CORE_CRT1
 	bool "Use crt1.S from core"
 	default y

arch/xtensa/core/CMakeLists.txt

@@ -48,7 +48,7 @@ add_subdirectory(startup)
 # are the official places where we find core-isa.h. (Also that we
 # undefine __XCC_ because that compiler actually trips an error trying
 # to build this file to protect against mismatched versions.)
-set(CORE_ISA_DM ${CMAKE_BINARY_DIR}/zephyr/include/generated/zephyr/core-isa-dM.h)
+set(CORE_ISA_DM ${CMAKE_BINARY_DIR}/zephyr/include/generated/core-isa-dM.h)
 set(CORE_ISA_IN ${CMAKE_BINARY_DIR}/zephyr/include/generated/core-isa-dM.c)
 file(WRITE ${CORE_ISA_IN} "#include <xtensa/config/core-isa.h>\n")
 add_custom_command(OUTPUT ${CORE_ISA_DM}
@@ -73,7 +73,7 @@ else()
 endif()
 
 # Generates a list of device-specific scratch register choices
-set(ZSR_H ${CMAKE_BINARY_DIR}/zephyr/include/generated/zephyr/zsr.h)
+set(ZSR_H ${CMAKE_BINARY_DIR}/zephyr/include/generated/zsr.h)
 add_custom_command(OUTPUT ${ZSR_H} DEPENDS ${CORE_ISA_DM}
   COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/gen_zsr.py
                                $<$<BOOL:${CONFIG_XTENSA_MMU}>:--mmu>
@@ -84,30 +84,3 @@ add_custom_target(zsr_h DEPENDS ${ZSR_H})
 add_dependencies(zephyr_interface zsr_h)
 
 unset(MAY_NEED_SYSCALL_SCRATCH_REG)
-
-# Similar: auto-generate interrupt handlers
-set(HANDLERS ${CMAKE_BINARY_DIR}/zephyr/include/generated/xtensa_handlers)
-
-add_custom_command(
-  OUTPUT ${HANDLERS}_tmp.c
-  COMMAND ${CMAKE_C_COMPILER} -E -U__XCC__
-	  -I${ZEPHYR_XTENSA_MODULE_DIR}/zephyr/soc/${CONFIG_SOC}
-	  -o ${HANDLERS}_tmp.c
-	  - < ${CMAKE_CURRENT_SOURCE_DIR}/xtensa_intgen.tmpl)
-
-add_custom_command(
-  OUTPUT ${HANDLERS}.h
-  DEPENDS ${HANDLERS}_tmp.c
-  COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/xtensa_intgen.py
-          ${HANDLERS}_tmp.c > ${HANDLERS}.h)
-
-add_custom_target(xtensa_handlers_h DEPENDS ${HANDLERS}.h)
-add_dependencies(zephyr_interface xtensa_handlers_h)
-
-# Auto-generate interrupt vector entry
-set(VECS_LD ${CMAKE_BINARY_DIR}/zephyr/include/generated/xtensa_vectors.ld)
-add_custom_command(OUTPUT ${VECS_LD} DEPENDS ${CORE_ISA_DM}
-  COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/gen_vectors.py
-          ${CORE_ISA_DM} > ${VECS_LD})
-add_custom_target(xtensa_vectors_ld DEPENDS ${VECS_LD})
-add_dependencies(zephyr_interface xtensa_vectors_ld)

arch/xtensa/core/coredump.c

@@ -7,7 +7,7 @@
 #include <string.h>
 #include <zephyr/debug/coredump.h>
 #include <xtensa_asm2_context.h>
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 #define ARCH_HDR_VER			1
 #define XTENSA_BLOCK_HDR_VER		2

arch/xtensa/core/debug_helpers_asm.S

@@ -10,7 +10,7 @@
 #include <xtensa/hal.h>
 #include <xtensa_asm2_context.h>
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 	.section    .iram1, "ax"
 	.align      4

arch/xtensa/core/fatal.c

@@ -154,6 +154,6 @@ static void z_vrfy_xtensa_user_fault(unsigned int reason)
 	z_impl_xtensa_user_fault(reason);
 }
 
-#include <zephyr/syscalls/xtensa_user_fault_mrsh.c>
+#include <syscalls/xtensa_user_fault_mrsh.c>
 
 #endif /* CONFIG_USERSPACE */

arch/xtensa/core/gen_vectors.py

@@ -1,122 +0,0 @@
-#!/usr/bin/env python3
-# Copyright 2023 The ChromiumOS Authors
-# SPDX-License-Identifier: Apache-2.0
-import sys
-import re
-
-# Xtensa Vector Table linker generator
-#
-# Takes a pre-processed (gcc -dM) core-isa.h file as its first
-# argument, and emits a GNU linker section declartion which will
-# correctly load the exception vectors and literals as long as their
-# code is declared using standard conventions (see below).
-#
-# The section name will be ".z_xtensa_vectors", and a symbol
-# "z_xtensa_vecbase" is emitted containing a valid value for the
-# VECBASE SR at runtime.
-#
-# Obviously, this requires that XCHAL_HAVE_VECBASE=1.  A similar trick
-# could be played to load vectors at fixed addresses on hardware that
-# lacks VECBASE, but the core-isa.h interface is inexplicably
-# different.
-#
-# Because the "standard conventions" (which descend from somewhere in
-# Cadence) are not documented anywhere and just end up cut and pasted
-# between devices, here's an attempt at a specification:
-#
-# + The six register window exception vectors are defined with offsets
-#   internal to their assembly code.  They are linked in a single
-#   section named ".WindowVectors.text".
-#
-# + The "kernel", "user" and "double exception" vectors are emitted in
-#   sections named ".KernelExceptionVector.text",
-#   "UserExceptionVector.text" and "DoubleExceptionVector.text"
-#   respectively.
-#
-# + XEA2 interrupt vectors are in sections named
-#   ".Level<n>InterruptVector.text", except (!) for ones which are
-#   given special names.  The "debug" and "NMI" interrupts (if they
-#   exist) are technically implemented as standard interrupt vectors
-#   (of a platform-dependent level), but the code for them is emitted
-#   in ".DebugExceptionVector.text" and ".NMIExceptionVector.text",
-#   and not a section corresponding to their interrupt level.
-#
-# + Any unused bytes at the end of a vector are made available as
-#   storage for immediate values used by the following vector (Xtensa
-#   can only back-reference immediates for MOVI/L32R instructions) as
-#   a "<name>Vector.literal" section.  Note that there is no guarantee
-#   of how much space is available, it depends on the previous
-#   vector's code size.  Zephyr code has historically not used this
-#   space, as support in existing linker scripts is inconsistent.  But
-#   it's exposed here.
-
-coreisa = sys.argv[1]
-
-debug_level = 0
-
-# Translation for the core-isa.h vs. linker section naming conventions
-sect_names = { "DOUBLEEXC" : "DoubleException",
-               "KERNEL" : "KernelException",
-               "NMI" : "NMIException",
-               "USER" : "UserException" }
-
-offsets = {}
-
-with open(coreisa) as infile:
-    for line in infile.readlines():
-        m = re.match(r"^#define\s+XCHAL_([^ ]+)_VECOFS\s*(.*)", line.rstrip())
-        if m:
-            (sym, val) = (m.group(1), m.group(2))
-            if sym == "WINDOW_OF4":
-                # This must be the start of the section
-                assert eval(val) == 0
-            elif sym.startswith("WINDOW"):
-                # Ignore the other window exceptions, they're internally sorted
-                pass
-            elif sym == "RESET":
-                # Ignore, not actually part of the vector table
-                pass
-            elif sym == "DEBUG":
-                # This one is a recursive macro that doesn't expand,
-                # so handle manually
-                m = re.match(r"XCHAL_INTLEVEL(\d+)_VECOFS", val)
-                if not m:
-                    print(f"no intlevel match for debug val {val}")
-                assert m
-                debug_level = eval(m.group(1))
-            else:
-                if val == "XCHAL_NMI_VECOFS":
-                    # This gets recursively defined in the other
-                    # direction, so ignore the INTLEVEL
-                    pass
-                else:
-                    addr = eval(val)
-                    m = re.match(r"^INTLEVEL(\d+)", sym)
-                    if m:
-                        offsets[f"Level{m.group(1)}Interrupt"] = addr
-                    else:
-                        offsets[sect_names[sym]] = addr
-
-if debug_level > 0:
-    old = f"Level{debug_level}Interrupt"
-    offsets[f"DebugException"] = offsets[old]
-    del offsets[old]
-
-sects = list(offsets)
-sects.sort(key=lambda s: offsets[s])
-
-print("/* Automatically Generated Code - Do Not Edit */")
-print("/* See arch/xtensa/core/gen_vector.py */")
-print("")
-
-# The 1k alignment is experimental, the docs on the Relocatable Vector
-# Option doesn't specify an alignment at all, but writes to the
-# bottom bits don't take...
-print( "  .z_xtensa_vectors : ALIGN(1024) {")
-print( "    z_xtensa_vecbase = .;")
-print(f"    KEEP(*(.WindowVectors.text));")
-for s in sects:
-    print(f"    KEEP(*(.{s}Vector.literal));")
-    print( "    . = 0x%3.3x;" % (offsets[s]))
-    print(f"    KEEP(*(.{s}Vector.text));")
-print("  }")

arch/xtensa/core/irq_offload.c

@@ -5,7 +5,7 @@
 
 #include <zephyr/kernel.h>
 #include <zephyr/irq_offload.h>
-#include <zephyr/zsr.h>
+#include <zsr.h>
 #include <zephyr/irq.h>
 
 static struct {

arch/xtensa/core/userspace.S

@@ -5,10 +5,10 @@
  */
 
 #include <xtensa_asm2_s.h>
-#include <zephyr/offsets.h>
+#include <offsets.h>
 #include <offsets_short.h>
 #include <zephyr/syscall.h>
-#include <zephyr/zsr.h>
+#include <zsr.h>
 
 #include <xtensa/config/core-isa.h>
 

arch/xtensa/core/vector_handlers.c

@@ -10,18 +10,13 @@
 #include <zephyr/kernel_structs.h>
 #include <kernel_internal.h>
 #include <kswap.h>
+#include <_soc_inthandlers.h>
 #include <zephyr/toolchain.h>
 #include <zephyr/logging/log.h>
-#include <zephyr/offsets.h>
+#include <offsets.h>
-#include <zephyr/zsr.h>
+#include <zsr.h>
 #include <zephyr/arch/common/exc_handle.h>
 
-#ifdef CONFIG_XTENSA_GEN_HANDLERS
-#include <xtensa_handlers.h>
-#else
-#include <_soc_inthandlers.h>
-#endif
-
 #include <xtensa_internal.h>
 
 LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
@@ -364,7 +359,7 @@ void *xtensa_excint1_c(int *interrupted_stack)
 		 *    thread.
 		 */
 		__asm__ volatile("rsil %0, %1"
-				: "=r" (ignore) : "i"(XCHAL_EXCM_LEVEL));
+				: "=r" (ignore) : "i"(XCHAL_NMILEVEL));
 
 		_current_cpu->nested = 1;
 	}

arch/xtensa/core/window_vectors.S

@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <xtensa/coreasm.h>
-#include <zephyr/zsr.h>
+#include <zsr.h>
 
 /* WINDOW OVERFLOW AND UNDERFLOW EXCEPTION VECTORS AND ALLOCA EXCEPTION
  * HANDLER

arch/xtensa/core/xtensa_asm2_util.S

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <xtensa_asm2_s.h>
-#include <zephyr/offsets.h>
+#include <offsets.h>
-#include <zephyr/zsr.h>
+#include <zsr.h>
 
 #if defined(CONFIG_SIMULATOR_XTENSA) || defined(XT_SIMULATOR)
 #include <xtensa/simcall.h>

arch/xtensa/core/xtensa_hifi.S

@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 #include <xtensa/config/tie.h>
 #include <xtensa/config/tie-asm.h>

arch/xtensa/core/xtensa_intgen.py

@@ -105,11 +105,13 @@ for l in ints_by_lvl:
         cprint("#endif")
 cprint("")
 
-# Populate all theoretical levels just in case.  Odd cores have been
+# Populate empty levels just for sanity.  The second-to-last interrupt
-# seen in the wild with "empty" interrupt levels that exist in the
+# level (usually "debug") typically doesn't have any associated
-# hardware but without any interrupts associated with them.  The
+# vectors, but we don't have any way to know that a-prioi.
-# unused handlers will be ignored if uncalled.
+max = 0
-max = 15
+for lvl in ints_by_lvl:
+    if lvl > max:
+        max = lvl
 
 for lvl in range(0, max+1):
     if not lvl in ints_by_lvl:

arch/xtensa/include/kernel_arch_func.h

@@ -14,7 +14,7 @@
 #include <kernel_internal.h>
 #include <string.h>
 #include <zephyr/cache.h>
-#include <zephyr/zsr.h>
+#include <zsr.h>
 
 #ifdef __cplusplus
 extern "C" {

arch/xtensa/include/xtensa_asm2_s.h

@@ -7,10 +7,10 @@
 #ifndef ZEPHYR_ARCH_XTENSA_INCLUDE_XTENSA_ASM2_S_H
 #define ZEPHYR_ARCH_XTENSA_INCLUDE_XTENSA_ASM2_S_H
 
-#include <zephyr/zsr.h>
+#include <zsr.h>
 #include "xtensa_asm2_context.h"
 
-#include <zephyr/offsets.h>
+#include <offsets.h>
 
 /* Assembler header!  This file contains macros designed to be included
  * only by the assembler.

boards/adafruit/feather/adafruit_feather_nrf52840.yaml

@@ -9,6 +9,7 @@ toolchain:
 supported:
   - adc
   - usb_device
+  - usb_cdc
   - ble
   - watchdog
   - counter

boards/adafruit/itsybitsy/adafruit_itsybitsy_nrf52840.yaml

@@ -16,6 +16,7 @@ supported:
   - i2c
   - pwm
   - spi
+  - usb_cdc
   - usb_device
   - watchdog
 vendor: adafruit

boards/adi/max32690evkit/Kconfig.max32690evkit

@@ -1,7 +0,0 @@
-# MAX32690 board configuration
-
-# Copyright (c) 2023-2024 Analog Devices, Inc.
-# SPDX-License-Identifier: Apache-2.0
-
-config BOARD_MAX32690EVKIT
-	select SOC_MAX32690_M4 if BOARD_MAX32690EVKIT_MAX32690_M4

boards/adi/max32690evkit/board.cmake

@@ -1,9 +0,0 @@
-# Copyright (c) 2023-2024 Analog Devices, Inc.
-# SPDX-License-Identifier: Apache-2.0
-
-board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]")
-board_runner_args(openocd --cmd-pre-init "source [find target/max32690.cfg]")
-board_runner_args(jlink "--device=MAX32690" "--reset-after-load")
-
-include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
-include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/adi/max32690evkit/board.yml

@@ -1,8 +0,0 @@
-# Copyright (c) 2023-2024 Analog Devices, Inc.
-# SPDX-License-Identifier: Apache-2.0
-
-board:
-  name: max32690evkit
-  vendor: adi
-  socs:
-    - name: max32690

boards/adi/max32690evkit/doc/index.rst

@@ -1,292 +0,0 @@
-.. _max32690_evkit:
-
-MAX32690EVKIT
-#############
-
-Overview
-********
-The MAX32690 evaluation kit (EV kit) provides a platform for evaluating the capabilities
-of the MAX32690 microcontroller, which is an advanced system-on-chip (SoC).
-It features an Arm® Cortex®-M4F CPU for efficient computation of complex functions and
-algorithms, and the latest generation Bluetooth® 5 Low Energy (Bluetooth LE) radio designed
-for wearable and hearable fitness devices, portable and wearable wireless medical devices,
-industrial sensors/networks, internet of things (IoT), and asset tracking.
-
-The Zephyr port is running on the MAX32690 MCU.
-
-.. image:: img/max32690evkit_img1.jpg
-   :align: center
-   :alt: MAX32690 EVKIT Front
-
-.. image:: img/max32690evkit_img2.jpg
-   :align: center
-   :alt: MAX32690 Back
-
-Hardware
-********
-
-- MAX32690 MCU:
-
-    - Ultra-Efficient Microcontroller for Battery-Powered Applications
-
-      - 120MHz Arm Cortex-M4 Processor with FPU
-      - 7.3728MHz and 60MHz Low-Power Oscillators
-      - External Crystal Support (32MHz required for BLE)
-      - 32.768kHz RTC Clock (Requires External Crystal)
-      - 8kHz Always-On Ultra-Low Power Oscillator
-      - 3MB Internal Flash, 1MB Internal SRAM (832kB ECC ON)
-      - TBDμW/MHz Executing from Cache at 1.1V
-      - 1.8V and 3.3V I/O with No Level Translators
-      - External Flash & SRAM Expansion Interfaces
-
-    - Bluetooth 5.2 LE Radio
-
-      - Dedicated, Ultra-Low-Power, 32-Bit RISC-V Coprocessor to Offload Timing-Critical Bluetooth Processing
-      - Fully Open-Source Bluetooth 5.2 Stack Available
-      - Supports AoA, AoD, LE Audio, and Mesh
-      - High-Throughput (2Mbps) Mode
-      - Long-Range (125kbps and 500kbps) Modes
-      - Rx Sensitivity: -97.5dBm; Tx Power: +4.5dBm
-      - Single-Ended Antenna Connection (50Ω)
-
-    - Multiple Peripherals for System Control
-
-      - 16-Channel DMA
-      - Up To Five Quad SPI Master (60MHz)/Slave (48MHz)
-      - Up To Four 1Mbaud UARTs with Flow Control
-      - Up To Two 1MHz I2C Master/Slave
-      - I2S Master/Slave
-      - Eight External Channel, 12-bit 1MSPS SAR ADC w/ on-die temperature sensor
-      - USB 2.0 Hi-Speed Device
-      - 16 Pulse Train Engines
-      - Up To Six 32-Bit Timers with 8mA High Drive
-      - Up To Two CAN 2.0 Controllers
-      - Up To Four Micro-Power Comparators
-      - 1-Wire Master
-
-    - Security and Integrity​
-
-      - ChipDNA Physically Un-clonable Function (PUF)
-      - Modular Arithmetic Accelerator (MAA), True Random Number Generator (TRNG)
-      - Secure Nonvolatile Key Storage, SHA-256, AES-128/192/256
-      - Secure Boot ROM
-
-- External devices connected to the MAX32690EVKIT:
-
-  - Bluetooth SMA Connector with a Hinged 2.4GHz Whip Antenna
-  - 3-Pin Terminal Block for CAN Bus 2.0
-  - Selectable On-Board High-Precision Voltage Reference
-  - On-Board HyperRAM
-  - Stereo Audio Codec with Line-In and Line-Out 3.5mm Jacks
-  - 128 x 128 (1.45in) Color TFT Display
-  - USB 2.0 Micro-B Interface to the MAX32690
-  - USB 2.0 Micro-B to Serial UART
-  - Board Power Provided by either USB Port
-  - Jumpers to Enable Optional Pull-Up Resistors on I2C port
-  - All GPIOs Signals Accessed through 0.1in Headers
-  - Three Analog Inputs Accessed through 0.1in Headers with Optional Filtering
-  - SWD 10-Pin Header
-  - On-Board 3.3V, 1.8V, and 1.1V LDO Regulators
-  - Individual Power Measurement on All IC Rails through Jumpers
-  - Two General-Purpose LEDs and One GeneralPurpose Push Button Switch
-
-
-Supported Features
-==================
-
-Below interfaces are supported by Zephyr on MAX32690EVKIT.
-
-+-----------+------------+-------------------------------------+
-| Interface | Controller | Driver/Component                    |
-+===========+============+=====================================+
-| NVIC      | on-chip    | nested vector interrupt controller  |
-+-----------+------------+-------------------------------------+
-| SYSTICK   | on-chip    | systick                             |
-+-----------+------------+-------------------------------------+
-| CLOCK     | on-chip    | clock and reset control             |
-+-----------+------------+-------------------------------------+
-| GPIO      | on-chip    | gpio                                |
-+-----------+------------+-------------------------------------+
-| UART      | on-chip    | serial                              |
-+-----------+------------+-------------------------------------+
-
-
-Connections and IOs
-===================
-
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| Name      | Name          | Settings      | Description                                                                                      |
-+===========+===============+===============+==================================================================================================+
-| JP1       | VREF          |               |                                                                                                  |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects external voltage reference to VREF pin, must be enabled in software. |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  |  Disconnects external voltage reference.                                      |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP2       | I2C0 PU       | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 2-1       | |  | Connects VDDIO (1V8) to I2C0 pull-up resistors.                               |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 2-3       | |  | Connects VDDIOH (3V3) to I2C0 pull-up resistors.                              |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects power from I2C0 pull-up resistors.                                |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP3       | I2C0_SDA_PU   | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects pull-up to I2C0A_SDA (P2.7) sourced by I2C0 PU (JP2).                |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects pull-up from I2C0A_SDA (P2.7) sourced by I2C0 PU (JP2).           |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP4       | I2C0_SCL_PU   | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects pull-up to I2C0A_SCL (P2.8) sourced by I2C0 PU (JP2).                |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects pull-up from I2C0A_SCL (P2.8) sourced by I2C0 PU (JP2).           |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP5       | LED0 EN       | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects red LED D1 to P0.14.                                                 |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects red LED D1 from P0.14.                                            |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP6       | LED1 EN       | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects green LED D2 to P2.12.                                               |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects green LED D2 from P2.12.                                          |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP7       | RX EN         | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects the USB - serial  bridge to UART2A_RX (P1.9).                        |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects the USB - serial  bridge from UART2A_RX (P1.9).                   |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP8       | TX EN         | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects the USB - serial  bridge to UART2A_TX (P1.10).                       |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects the USB - serial  bridge from UART2A_TX (P1.10).                  |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP9       | P1_7 SEL      | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 2-1       | |  | Connects the USB - serial  bridge to UART2A_CTS (P1.7).                       |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 2-3       | |  | Connects I2C2C_SDA (P1.7) to the codec.                                       |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP10      | P1_8 SEL      | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 2-1       | |  | Connects the USB - serial  bridge to UART2A_RTS (P1.8).                       |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 2-3       | |  | Connects I2C2C_SCL (P1.8) to the codec.                                       |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP11      | V_AUX SEL     | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 2-1       | |  | Connects V_AUX to 1V8.                                                        |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 2-3       | |  | Connects V_AUX to 3V3.                                                        |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP12      | VDD3A EN      | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects 3V3 to VDD3A.                                                        |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects 3V3 from VDD3A.                                                   |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP13      | VDDIOH EN     | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects 3V3 to VDDIOH.                                                       |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects 3V3 from VDDIOH.                                                  |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP14      | VDDB EN       | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects a 3V3 LDO sourced by USB_VBUS (CN1) to VDDB.                         |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects a 3V3 LDO sourced by USB_VBUS (CN1) from VDDB.                    |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP15      | VDDA EN       | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects 1V8 to VDDA.                                                         |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects 1V8 from VDDA.                                                    |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP16      | VDDIO EN      | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects 1V8 to VDDIO.                                                        |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects 1V8 from VDDIO.                                                   |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP17      | VCORE EN      | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects 1V1 to VCORE.                                                        |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects 1V1 from VCORE.                                                   |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JP18      | BLE LDO EN    | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects 1V4 to BLE_LDO.                                                      |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects 1V4 from BLE_LDO.                                                 |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-| JH6       | ANALOG PORT3  | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 1-2       | |  | Connects LPUART0B_RX (P3.0) to the SWD connector.                             |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | 3-4       | |  | Connects LPUART0B_TX (P3.1) to the SWD connector.                             |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               | | Open      | |  | Disconnects LPUART0B_RX (P3.0) and LPUART0B_TX (P3.1) from the SWD connector. |               |
-|           |               | +-----------+ |  +-------------------------------------------------------------------------------+               |
-|           |               |               |                                                                                                  |
-+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
-
-Programming and Debugging
-*************************
-
-Flashing
-========
-
-The MAX32690 MCU can be flashed by connecting an external debug probe to the
-SWD port. SWD debug can be accessed through the Cortex 10-pin connector, J3.
-Logic levels are fixed to VDDIO (1.8V).
-
-Once the debug probe is connected to your host computer, then you can simply run the
-``west flash`` command to write a firmware image into flash.
-
-.. note::
-
-   This board uses OpenOCD as the default debug interface. You can also use
-   a Segger J-Link with Segger's native tooling by overriding the runner,
-   appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
-   be connected to the standard 2*5 pin debug connector (JW3) using an
-   appropriate adapter board and cable.
-
-Debugging
-=========
-
-Please refer to the `Flashing`_ section and run the ``west debug`` command
-instead of ``west flash``.
-
-References
-**********
-
-- `MAX32690EVKIT web page`_
-
-.. _MAX32690EVKIT web page:
-   https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/MAX32690EVKIT.html

boards/adi/max32690evkit/max32690evkit_max32690_m4.dts

@@ -1,87 +0,0 @@
-/*
- * Copyright (c) 2023-2024 Analog Devices, Inc.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/dts-v1/;
-
-#include <adi/max32/max32690.dtsi>
-#include <adi/max32/max32690-pinctrl.dtsi>
-#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
-
-/ {
-	model = "Analog Devices MAX32690EVKIT";
-	compatible = "adi,max32690evkit";
-
-	chosen {
-		zephyr,console = &uart2;
-		zephyr,shell-uart = &uart2;
-		zephyr,sram = &sram0;
-		zephyr,flash = &flash0;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		red_led: led_0 {
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
-			label = "LED0";
-		};
-		green_led: led_1 {
-			gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
-			label = "LED1";
-		};
-	};
-
-	buttons {
-		compatible = "gpio-keys";
-		pb0: pb0 {
-			gpios = <&gpio4 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
-			label = "SW2";
-		};
-	};
-
-	aliases {
-		led0 = &red_led;
-		led1 = &green_led;
-		sw0 = &pb0;
-	 };
-};
-
-&clk_ipo {
-	status = "okay";
-};
-
-&clk_ibro {
-	status = "okay";
-};
-
-&gpio0 {
-	status = "okay";
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
-&gpio4 {
-	status = "okay";
-};
-
-&uart2 {
-	clock-source = <ADI_MAX32_PRPH_CLK_SRC_IBRO>;
-	pinctrl-0 = <&uart2a_tx_p1_10 &uart2a_rx_p1_9>;
-	pinctrl-names = "default";
-	current-speed = <115200>;
-	data-bits = <8>;
-	parity = "none";
-	status = "okay";
-};

boards/adi/max32690evkit/max32690evkit_max32690_m4.yaml

@@ -1,13 +0,0 @@
-identifier: max32690evkit/max32690/m4
-name: max32690evkit m4
-type: mcu
-arch: arm
-toolchain:
-  - zephyr
-  - gnuarmemb
-  - xtools
-supported:
-  - gpio
-  - serial
-ram: 1024
-flash: 3072

boards/adi/max32690evkit/max32690evkit_max32690_m4_defconfig

@@ -1,13 +0,0 @@
-# Copyright (c) 2023-2024 Analog Devices, Inc.
-# SPDX-License-Identifier: Apache-2.0
-
-# Enable GPIO
-CONFIG_GPIO=y
-
-# Console
-CONFIG_CONSOLE=y
-CONFIG_UART_CONSOLE=y
-
-# Enable UART
-CONFIG_SERIAL=y
-CONFIG_UART_INTERRUPT_DRIVEN=y

boards/ambiq/apollo3_evb/apollo3_evb-pinctrl.dtsi

@@ -148,15 +148,4 @@
 			ambiq,iom-num = <6>;
 		};
 	};
-
-	bleif_default: bleif_default{
-		group1 {
-			pinmux = <BLEIF_SCK_P30>,
-				 <BLEIF_MISO_P31>,
-				 <BLEIF_MOSI_P32>,
-				 <BLEIF_CSN_P33>,
-				 <BLEIF_STATUS_P35>,
-				 <BLEIF_IRQ_P41>;
-		};
-	};
 };

boards/ambiq/apollo3_evb/apollo3_evb.dts

@@ -84,12 +84,6 @@
 	};
 };
 
-&bleif {
-	pinctrl-0 = <&bleif_default>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
 &uart0 {
 	current-speed = <115200>;
 	pinctrl-0 = <&uart0_default>;
@@ -97,50 +91,6 @@
 	status = "okay";
 };
 
-&wdt0 {
-	status = "okay";
-};
-
-&i2c3 {
-	compatible = "ambiq,i2c";
-	pinctrl-0 = <&i2c3_default>;
-	pinctrl-names = "default";
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-	status = "okay";
-};
-
-&counter0 {
-	status = "okay";
-};
-
-&counter1 {
-	status = "okay";
-};
-
-&counter2 {
-	status = "okay";
-};
-
-&counter3 {
-	status = "okay";
-};
-
-&counter4 {
-	status = "okay";
-};
-
-&counter5 {
-	status = "okay";
-};
-
-&counter6 {
-	status = "okay";
-};
-
-&counter7 {
-	status = "okay";
-};
-
 &gpio0_31 {
 	status = "okay";
 };

boards/ambiq/apollo3_evb/apollo3_evb.yaml

@@ -9,10 +9,7 @@ toolchain:
   - gnuarmemb
 supported:
   - uart
-  - watchdog
-  - counter
   - gpio
-  - i2c
 testing:
   ignore_tags:
     - net

boards/ambiq/apollo3p_evb/apollo3p_evb-pinctrl.dtsi

@@ -193,15 +193,4 @@
 			ambiq,iom-num = <2>;
 		};
 	};
-
-	bleif_default: bleif_default{
-		group1 {
-			pinmux = <BLEIF_SCK_P30>,
-				 <BLEIF_MISO_P31>,
-				 <BLEIF_MOSI_P32>,
-				 <BLEIF_CSN_P33>,
-				 <BLEIF_STATUS_P35>,
-				 <BLEIF_IRQ_P41>;
-		};
-	};
 };

boards/ambiq/apollo3p_evb/apollo3p_evb.dts

@@ -84,12 +84,6 @@
 	};
 };
 
-&bleif {
-	pinctrl-0 = <&bleif_default>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
 &uart0 {
 	current-speed = <115200>;
 	pinctrl-0 = <&uart0_default>;
@@ -97,50 +91,6 @@
 	status = "okay";
 };
 
-&wdt0 {
-	status = "okay";
-};
-
-&i2c3 {
-	compatible = "ambiq,i2c";
-	pinctrl-0 = <&i2c3_default>;
-	pinctrl-names = "default";
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-	status = "okay";
-};
-
-&counter0 {
-	status = "okay";
-};
-
-&counter1 {
-	status = "okay";
-};
-
-&counter2 {
-	status = "okay";
-};
-
-&counter3 {
-	status = "okay";
-};
-
-&counter4 {
-	status = "okay";
-};
-
-&counter5 {
-	status = "okay";
-};
-
-&counter6 {
-	status = "okay";
-};
-
-&counter7 {
-	status = "okay";
-};
-
 &gpio0_31 {
 	status = "okay";
 };

boards/ambiq/apollo3p_evb/apollo3p_evb.yaml

@@ -9,10 +9,7 @@ toolchain:
   - gnuarmemb
 supported:
   - uart
-  - watchdog
-  - counter
   - gpio
-  - i2c
 testing:
   ignore_tags:
     - net

boards/arduino/giga_r1/arduino_giga_r1_stm32h747xx_m7.yaml

@@ -14,5 +14,6 @@ supported:
   - arduino_spi
   - spi
   - memc
+  - usb_cdc
   - usb_device
 vendor: arduino

boards/arduino/nano_33_ble/arduino_nano_33_ble.yaml

@@ -14,6 +14,7 @@ supported:
   - serial
   - spi
   - uart
+  - usb_cdc
   - usb_device
   - watchdog
 vendor: arduino

boards/arduino/nano_33_ble/arduino_nano_33_ble_nrf52840_sense.yaml

@@ -14,6 +14,7 @@ supported:
   - serial
   - spi
   - uart
+  - usb_cdc
   - usb_device
   - watchdog
 vendor: arduino

boards/arm/fvp_baser_aemv8r/board.cmake

@@ -5,8 +5,7 @@ set(SUPPORTED_EMU_PLATFORMS armfvp)
 set(ARMFVP_BIN_NAME FVP_BaseR_AEMv8R)
 set(ARMFVP_MIN_VERSION 11.16.16)
 
-if(CONFIG_BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH64 OR
+if(CONFIG_BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH64)
-    CONFIG_BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH64_SMP)
   set(ARMFVP_FLAGS
     -C cluster0.has_aarch64=1
     -C cluster0.VMSA_supported=0
@@ -39,8 +38,7 @@ if(CONFIG_BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH64 OR
     -C bp.vis.rate_limit-enable=0
     -C cache_state_modelled=1
     )
-elseif(CONFIG_BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH32 OR
+elseif(CONFIG_BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH32)
-    CONFIG_BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH32_SMP)
   set(ARMFVP_FLAGS
     -C cluster0.has_aarch64=0
     -C cluster0.VMSA_supported=0

boards/arm/mps2/mps2_an521_cpu0_ns.yaml

@@ -14,5 +14,6 @@ testing:
   only_tags:
     - arm
     - kernel
+    - tfm
     - userspace
     - trusted-firmware-m

boards/arm/mps3/mps3_an547_ns.yaml

@@ -18,4 +18,4 @@ toolchain:
 testing:
   default: true
   only_tags:
-    - trusted-firmware-m
+    - tfm

boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml

@@ -20,6 +20,7 @@ supported:
   - pwm
   - spi
   - uart
+  - usb_cdc
   - usb_device
   - watchdog
 vendor: atmel

boards/atmel/sam0/saml21_xpro/saml21_xpro.yaml

@@ -20,6 +20,7 @@ supported:
   - pwm
   - spi
   - uart
+  - usb_cdc
   - usb_device
   - watchdog
 vendor: atmel

boards/atmel/sam0/samr34_xpro/samr34_xpro.yaml

@@ -20,6 +20,7 @@ supported:
   - pwm
   - spi
   - uart
+  - usb_cdc
   - usb_device
   - watchdog
 vendor: atmel

boards/common/renode.board.cmake

@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-board_set_sim_runner_ifnset(renode)
-
-board_runner_args(renode "--renode-command=$elf=@${PROJECT_BINARY_DIR}/${KERNEL_ELF_NAME}")
-board_runner_args(renode "--renode-command=include @${RENODE_SCRIPT}")
-
-board_finalize_runner_args(renode)

boards/common/renode_robot.board.cmake

@@ -1,17 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-board_set_robot_runner_ifnset(renode-robot)
-
-# `--variable` is a renode-test argument, for setting a variable that can be later used in a .robot file:
-# ELF:         used in common.robot to set the `elf` variable in the default .resc script defined in board.cmake
-# RESC:        path to the .resc script, defined in board.cmake
-# UART:        default UART used by Robot in tests, defined in board.cmake
-# KEYWORDS:    path to common.robot, which contains common Robot keywords
-# RESULTS_DIR: directory in which Robot artifacts will be generated after running a testsuite
-board_runner_args(renode-robot "--renode-robot-arg=--variable=ELF:@${PROJECT_BINARY_DIR}/${KERNEL_ELF_NAME}")
-board_runner_args(renode-robot "--renode-robot-arg=--variable=RESC:@${RENODE_SCRIPT}")
-board_runner_args(renode-robot "--renode-robot-arg=--variable=UART:${RENODE_UART}")
-board_runner_args(renode-robot "--renode-robot-arg=--variable=KEYWORDS:${ZEPHYR_BASE}/tests/robot/common.robot")
-board_runner_args(renode-robot "--renode-robot-arg=--variable=RESULTS_DIR:${APPLICATION_BINARY_DIR}")
-
-board_finalize_runner_args(renode-robot)

boards/cypress/cy8ckit_062_ble/cy8ckit_062_ble_cy8c6347_m0.dts

@@ -7,7 +7,7 @@
 
 /dts-v1/;
 
-#include <infineon/cat1a/legacy/psoc6_cm0.dtsi>
+#include <cypress/psoc6_cm0.dtsi>
 #include "cy8ckit_062_ble_common.dtsi"
 
 / {

boards/cypress/cy8ckit_062_ble/cy8ckit_062_ble_cy8c6347_m4.dts

@@ -7,7 +7,7 @@
 
 /dts-v1/;
 
-#include <infineon/cat1a/legacy/psoc6_cm4.dtsi>
+#include <cypress/psoc6_cm4.dtsi>
 #include "cy8ckit_062_ble_common.dtsi"
 
 / {

boards/cypress/cy8ckit_062_wifi_bt/cy8ckit_062_wifi_bt_cy8c6247_m0.dts

@@ -7,7 +7,7 @@
 
 /dts-v1/;
 
-#include <infineon/cat1a/legacy/psoc6_cm0.dtsi>
+#include <cypress/psoc6_cm0.dtsi>
 #include <zephyr/dt-bindings/input/input-event-codes.h>
 
 / {

boards/cypress/cy8ckit_062_wifi_bt/cy8ckit_062_wifi_bt_cy8c6247_m4.dts

@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include <infineon/cat1a/legacy/psoc6_cm4.dtsi>
+#include <cypress/psoc6_cm4.dtsi>
 
 / {
 	model = "cy8ckit_062_wifi_bt_m4 with a Cypress PSoC6 SoC";

boards/cypress/cy8ckit_062s4/board.yml

@@ -1,5 +1,5 @@
 board:
   name: cy8ckit_062s4
-  vendor: infineon
+  vendor: cypress
   socs:
   - name: cy8c6244lqi_s4d92

boards/cypress/cy8ckit_062s4/cy8ckit_062s4.dts

@@ -4,7 +4,7 @@
  */
 
 /dts-v1/;
-#include <infineon/cat1a/mpns/CY8C6244LQI_S4D92.dtsi>
+#include <infineon/psoc6/mpns/CY8C6244LQI_S4D92.dtsi>
 
 / {
 	model = "Infineon PSoC 62S4 Pioneer Kit";

boards/cypress/cy8ckit_062s4/cy8ckit_062s4.yaml

@@ -12,4 +12,4 @@ toolchain:
   - gnuarmemb
 supported:
   - gpio
-vendor: infineon
+vendor: cypress

boards/cypress/cy8cproto_062_4343w/board.yml

@@ -1,5 +1,5 @@
 board:
   name: cy8cproto_062_4343w
-  vendor: infineon
+  vendor: cypress
   socs:
   - name: cy8c624abzi_s2d44