Commit graph

136,983 commits

Author SHA1 Message Date
Thorsten Klein
bdbdbcbe8d scripts: west_commands: blobs: support blobs cache
An auto-cache directory can be provided via the `west blobs fetch
--auto-cache` argument or the `blobs.auto-cache-dir` config option.
When enabled, the auto-cache is automatically filled whenever a blob is
missing and must be downloaded.

One or more additional cache directories can be specified via argument
`west blobs fetch --cache-dirs` or the `blobs.cache-dir` config option
(multiple paths separated by `;`).

`west blobs fetch` searches all configured cache directories (including
the auto-cache) for a matching blob filename. Cached files may be stored
either under their original filename or with a SHA-256 suffix
(`<filename>.<sha>`).
If found, the blob is copied from the cache to the blob path; otherwise
it is downloaded from its url to the blob path.

Signed-off-by: Thorsten Klein <Thorsten.Klein@bshg.com>
2025-11-25 13:06:06 +01:00
Thorsten Klein
92a9a7eb00 .ruff-excludes: remove scripts/west_commands/blobs.py
Regarding documentation, when changing an excluded file, contributors
are encouraged to remove it from the list and format it in a separate
commit.

Signed-off-by: Thorsten Klein <Thorsten.Klein@bshg.com>
2025-11-25 13:06:06 +01:00
Thorsten Klein
8fab89e521 scripts: west_commands: format blobs.py
blobs.py is formatted with `ruff format`

Signed-off-by: Thorsten Klein <Thorsten.Klein@bshg.com>
2025-11-25 13:06:06 +01:00
Emil Gydesen
b8e71e6098 tests: Bluetooth: Tester: Allow connecting CIS in QoS state
Add support for connecting the CIS in QoS state.
To support this some checks were added to check the CIS
state while entering the enabling state, as well as the
ASE state when the CIS was connected to determine when to
send the ASE start opcode.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-25 13:04:46 +01:00
Emil Gydesen
29f4f24019 tests: Bluetooth: Add ASCS CIS connection events
Add support for the ASCS CIS connection state events.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-25 13:04:46 +01:00
Nakul Chauhan
0172845b3d ci/compliance: update requirements of check_compliance.py script
add missing modules to requirements-compliance.txt to run compliance script

Signed-off-by: Nakul Chauhan <nakulchauhan111@gmail.com>
2025-11-25 13:04:34 +01:00
Felix Wang
5d48b0718a samples: drivers: led: pwm: Add fallback blink delay calculation
When CONFIG_BLINK_DELAY_SHORT or CONFIG_BLINK_DELAY_LONG exceed the
timer's range, automatically calculate blink delays from the LED's
PWM period defined in devicetree using configurable divisors.

Add led_periods_ns array to store PWM periods for each LED and new
Kconfig options BLINK_DELAY_SHORT_LED_PERIOD_DIV and
BLINK_DELAY_LONG_LED_PERIOD_DIV to control the calculation.

This ensures the LED PWM sample works on platforms with timer
limitations by providing hardware-appropriate fallback delays.

Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2025-11-25 13:04:27 +01:00
Pascal Linder
f1e1d91e72 drivers: dma: stm32u5: Configure burst lengths
The source and destination burst lengths can be configured with a value
from 1 to 64. As the appropriate values are available in the DMA
configuration structure provided by Zephyr, these can be set during driver
configuration. Unfortunately, the STM32 DMA LL API does currently not
provide the minimum and maximum values.

Signed-off-by: Pascal Linder <pascal.linder@zuehlke.com>
2025-11-25 13:04:10 +01:00
Camille BAUD
eaf743e48b tests: drivers: build_all: add BFLB dbi test via boards/ai_m62_12f
Adds a BFLB DBI test

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
660f3a1976 drivers: mipi-dbi: Introduce BFLB dbi driver
Introduces a driver for the BL61x DBI peripheral

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
f361d5888a dts: Add BFLB dbi nodes
Adds nodes for the DBI peripheral

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
8209c59329 drivers: dma: bflb: Update DMA to properly support device usage
Make it so you can set both address and peripheral via dma_slot

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
a3c5e72904 drivers: clock_control: bflb: Add DBI elements
Add clock elements to enable using DBI

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
cadd0ecfe5 west.yml: Update hal_bouffalolab revision
Update to latest hal_bouffalolab revision for DBI.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Albort Xue
8885c708bf soc: nxp: mcx: mcxw7xx: Update power management in case of NBU is used.
Added conditional compilication for 'power_state_set' function. The
changes ensure that mode of NBU domain is manually set only when
the NBU is not used. If NBU is enabled, the mode of NBU domain is
auto updated by software run on NBU.

Change include:
- Conditional checks around the NBU mode in sleep and deep sleep mode.

Signed-off-by: Albort Xue <yao.xue@nxp.com>
2025-11-25 13:03:49 +01:00
Mario Paja
3c930a7760 drivers: i2s: stm32 sai enable dma priority configuration
This change enables the user to configure SAI DMA priority.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-11-25 13:03:41 +01:00
Anas Nashif
16fecc0276 manifest: optional: move lz4 to external
Move lz4 to become external module. It is not in the default manifest
anymore (through submanifests) and will need to be added if application
requires it per the docs.

Samples will be moved to the module itself.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Anas Nashif
015bf2ed49 manifest: move zscilib to be an external module
Remove from manifest and make it an external module.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Anas Nashif
13bf9895d8 ci: twister: pull testing group in manifest
We need the tests in CI to be able to run them on supported platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Anas Nashif
a7c53391d5 manifest: move psa-arch-tests to main manifest
Tests needed to verify tf-a module.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Anas Nashif
a2ccf506bd manifest: move tf-m-tests to main manifest
Those tests are needed for verifying and testing tf-m. While not needed
directly by zephyr, they are needed for testing and CI.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Fabian Blatz
8c264d30ea drivers: input: chsc5x: Add INPUT_TOUCH_STRUCT_CHECK for config
Adds the missing INPUT_TOUCH_STRUCT_CHECK for the config struct, to harden
against member reordering.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-24 15:27:41 -05:00
Fabian Blatz
421a4232ee drivers: input: Add input-touch assert for inversion without dimensions
Adds an assert to inform the user of possible coordinate wrap around
due to missing screen dimension configurations.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-24 15:27:41 -05:00
S Swetha
e891ca601e drivers: gpio: intel: Fix Pad IO Termination values
Swap PAD_CFG1_IOSTERM_PU and PAD_CFG1_IOSTERM_PD values.

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
dc34b3c40b tests: drivers: Add overlays for intel wcl boards
This commit introduces overlay files for intel
Wildcat lake boards

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
9271e65058 boards: intel: wcl: Add board definition
This commit introduces board defintion for Wildcat Lake.

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
9c5f675e37 dts: x86: intel: Add wildcat lake dtsi
This commit introduces device treee source for
Wildcat Lake platform

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
78a67404f0 dts: bindings: timer: Fix HPET clock frequency property
Fix HPET Clock-frequency property in yaml file

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
d7cede7b20 dts: bindings: cpu: Add wildcat lake yaml
Add wildcat lake yaml

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
bf093f939e soc: intel: wildcat_lake: Add soc support for WCL
This commit introduces SOC support for
Wildcat Lake.

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
Declan Snyder
cd4c027fce MAINTAINERS: Consolidate NXP areas using file-groups
Use the new file-groups feature to consolidate the NXP areas, and have
more specific collaborators/reviewers over certain areas.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-24 15:13:52 -05:00
Adrian Bonislawski
b33fc9a7b2 drivers: dai: intel: ssp: Fix SSP blob v3.0 TLV parsing
Fix incorrect TLV (Type-Length-Value) data length calculation for
SSP configuration blob version 3.0. The blob30->size field does not
include auxiliary TLV data appended after the main structure, leading
to incorrect parsing boundaries.

Changes:
- Use the total 'size' parameter instead of blob30->size for v3.0
- Pass size parameter through dai_ssp_parse_aux_data() chain
- Ensures correct parsing of auxiliary data (clocks, sync, DMA controls)

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 20:59:20 +01:00
Adrian Bonislawski
b038ee72fa drivers: dai: Add size parameter to dai_config_set API
Add explicit bespoke_cfg_size parameter to the dai_config_set()
function and its underlying driver API to improve configuration
validation and security.

Changes:
- Add 'size_t size' parameter to dai_driver_api.config_set callback
- Update dai_config_set() inline wrapper to pass size parameter
- Update all DAI driver implementations:
  - Intel: SSP, DMIC, HDA, ALH
  - NXP: SAI, ESAI, MICFIL
- Add documentation for new size parameter

This change enables drivers to validate the size of bespoke
configuration data, preventing buffer overruns and improving
robustness of the DAI configuration interface.

All existing callers must be updated to pass the size of their
bespoke configuration structures.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 20:59:20 +01:00
Adrian Bonislawski
552c1514a6 drivers: dai: intel: ssp: Add support for SSP_GTW_DMA_CONFIG_ID TLV type
Add handling for SSP_GTW_DMA_CONFIG_ID (0x1000) TLV type in SSP driver's
auxiliary data parsing functions. This TLV type is explicitly ignored as
it does not require any processing by the driver.

Changes:
- Define SSP_GTW_DMA_CONFIG_ID constant (0x1000) in dai-params-intel-ipc4.h
- Add case handling in dai_ssp_check_aux_data() to validate this TLV
- Add case handling in dai_ssp_parse_tlv() to skip processing of this TLV

This allows SSP configuration blobs containing SSP_GTW_DMA_CONFIG_ID
entries to be parsed successfully without triggering errors
for undefined TLV types.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 20:59:20 +01:00
Saravanan Sekar
c7bd062171 tests: drivers: build_all: fuel_gauge: Add hy4245 device to build test
Add build tests for the hycon,hy4245 device.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-11-24 14:58:39 -05:00
Saravanan Sekar
89df5f55ed drivers: fuelgauge: Add Hycon Technology HY4245 driver
Add a support for Hycon Technology HY4245 fuel gauge driver.

The HY4245 operates with Single and Two Cells Li+ battery cells as a
stand–along battery gauge. The device uses GaugePackTM algorithm, which
mixes Coulomb–Counting and Open–Circuit–Voltage (OCV) measurements with
battery cell characteristics to manage battery gauge, to maintain accurate
battery capacity estimates with compensation for rate, temperature, age
and self–discharge effects.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-11-24 14:58:39 -05:00
Saravanan Sekar
bcb83d5dda dts: fuel-gauge: hy4245: Add HY4245 fuel gauge
Add dts bindings for Hycon Technology HY4245 fuel gauge.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-11-24 14:58:39 -05:00
Adrian Bonislawski
af974c3074 soc: intel_adsp: ace: add IMR info registers
Adds devicetree nodes for IMR (Isolated Memory Regions)
information registers across all ACE platforms.
These registers provide information about the IMR memory region,
such as whether it is in use and its size.

Implements structures and utility functions to access
these registers and retrieve IMR information programmatically.
This allows dynamic detection of IMR availability and its size at runtime,
instead of relying on hardcoded values.

Removes the hardcoded IMR_L3_HEAP_SIZE definition since the size can now be
determined dynamically using the newly added ace_imr_get_mem_size() func.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 14:58:27 -05:00
Adrian Bonislawski
35a1e62035 soc: intel_adsp: ace40: extend hwreg1 MMU mapping
This patch will extend MMU mapping range for hwreg1 entry
because it is required to access lower register addresses

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 14:58:27 -05:00
Paul Luse
80c14d8a37 testsuite: ztest: fix bug in host only mock func
Change the mock for snprintf() to call the correct variadic function.

Signed-off-by: Paul Luse <paul.e.luse@intel.com>
2025-11-24 14:58:02 -05:00
Marco Domingo
42d0611ce0 doc: tfm: fix broken reference to mps3 board
Replace the outdated :ref:`mps3_board` reference with the proper
:zephyr:board:`mps3` role to align with current board documentation.

Signed-off-by: Marco Domingo <marco.domingo2@arm.com>
2025-11-24 14:57:46 -05:00
Marco Domingo
d13353115d boards: mps3/mps4: improve board searchability and naming
Update board YAML full_name to improve searchability and make it
easier to find Corstone FVP platforms in the supported boards list.

Update the mps3 .rst file to align the title and zephyr:board
directive with the YAML full_name, consistent with the mps4 board
documentation.

- mps3_an547 -> "MPS3 FPGA/Corstone FVP"
- mps4 -> "MPS4 Corstone FVP"

Signed-off-by: Marco Domingo <marco.domingo2@arm.com>
2025-11-24 14:57:46 -05:00
Appana Durga Kedareswara rao
4e8cafe641 arch: arm64: mmu: Call k_panic() when translation tables exhausted
When CONFIG_MAX_XLAT_TABLES is too small and new_table() cannot allocate
a translation table, the system must halt rather than continue with
undefined behavior.

This change ensures k_panic() is called after reporting the error,
preventing the system from proceeding when it runs out of translation
tables. Additionally, adds printk() fallback for configurations where
CONFIG_LOG is disabled to ensure the error is always visible.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2025-11-24 14:57:25 -05:00
Ayush Singh
64eefc709e drivers: gpio: cc13xx_cc26xx: Remove multi functions
- It seems that the mask variants of GPIO functions are not present in
  the latest sdk, so replace those with direct register access.
- This was already done in [0], but was reverted due to some hal
  problems.
- I am working on a hal update, but since this change does not require a
  hal update to work, it would be best to merge this first.

[0]: https://github.com/zephyrproject-rtos/zephyr/pull/83402

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-24 14:57:16 -05:00
Mathieu Choplain
0aa9877d9b drivers: usb: udc: fix OTGHS on STM32F7 SoCs with USBPHYC
From testing on STM32F723E-DISCO, it seems necessary to enable OTGHSULPI
clock in addition to USBPHYC when the internal USBPHYC HS PHY is used.
(USBPHYC is found on STM32F723xx, STM32F730Z8 and STM32F730I8 SoCs)

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-24 14:56:45 -05:00
Morten Kristensen
4f2ad9a53d scripts: ci: use vermin 1.8.0
Update workflow to use the new version of Vermin to enrich the Python
minimum version checks in the CI pipelines.

Signed-off-by: Morten Kristensen <me@mortens.dev>
2025-11-24 14:56:36 -05:00
Vladislav Kulikov
cde7195a57 MAINTAINERS: update SMF maintainers
Sam Burke has agreed to step down as maintainer of the State Machine
Framework (SMF), per discussion with Keith Short. Update the SMF
MAINTAINERS entry to reflect this by removing Sam.

Signed-off-by: Vladislav Kulikov <vlad_kulikov_c@pm.me>
2025-11-24 14:56:24 -05:00
Stoyan Bogdanov
79793542e1 MAINTAINERS: Add collaborator for TI SimpleLink Platforms
Add jpanisbl as collaborator for TI SimpleLink

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-11-24 14:56:14 -05:00
Andrew Kontra
7a65336edc net: C++ support for mdns_responder.h
mdns_responder.h did not include header guards for C++, causing
it to fail if used in a C++ file. This change adds the header
guards.

Tested using samples/cpp/hello_world, with an added call to
mdns_responder_set_ext_records().

Signed-off-by: Andrew Kontra <andrew@legatoxp.com>
2025-11-24 17:36:32 +01:00
Nik Schewtschuk
d36c0bec85 net: l2: ppp: Add support for LCP MRU negotiation
Previously, the LCP MRU option sent by the peer was ignored.
This could result in the interface MTU remaining at the default (1500),
even if the peer requested a smaller MRU, potentially leading to packet
loss. This commit adds parsing for the peer's MRU option and updates the
network interface MTU accordingly.

Signed-off-by: Nik Schewtschuk <nik@schew.dev>
2025-11-24 17:36:18 +01:00