Fix a spelling mistake in the board openocd cfg file for arduino
boards.
No functional change.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
It seems there is currently no impact except a warning displayed when
building: "unit address and first address in 'reg' (0x40113000) don't
match for /soc/peripheral@50000000/opamp@113000"
Signed-off-by: Joel Guittet <joelguittet@gmail.com>
coap_client_schedule_poll() never reports errors and always returns
0.
The error check at the call site is therefore dead code.
Make the function void and drop the unused error handling.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Handle both multicast packets and promiscuous mode in the driver. This
will allow the lan9250 to be added to a bridge as well as process
multicast packets being received.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
Update the NXP HAL with a change where PWM_Setup can return an error value
instead of asserting.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The bus recovery implementation did not reset the I2C block. If
a glitch on the bus looks like a start condition, the I2C block
will be stuck forever waiting for the associated stop. This adds
reset to the I2C block to address this type of error.
Signed-off-by: Tim Knodel <tbk@google.com>
Alarms are not supported due to RTC interrupt not triggered
in Run mode erratum.
Delete the overlay since RTC node already defined in the
board dts.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Usage or not of the input subsystem is an application decision hence
boards or shields defconfig should not force it, even if there might
be a touchpanel available on the board.
This commit remove enabling of CONFIG_INPUT in ST shields / boards.
This shouldn't have impact on in-tree application since LVGL samples
already enable CONFIG_INPUT.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Always enable the CONFIG_INPUT in the project since it is trying
to use inputs, and let inside the application figure out if there
is really an input device available or not to either simply
draw a label or a button with a label.
This also allow avoid need to have board specific conf file just
to enable CONFIG_INPUT as well has allow to use shields which
embed touchpanels.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
CONFIG_INPUT=y is already part of the demos sample prj.conf file so
it is not necessary to have it enabled in the st25dv_mb1283_disco
board specific conf file.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
This commit adds cache handling for Hifi4 core on RT600.
Enable CACHE_MANAGEMENT and HAS_DCACHE.
This is required for proper data coherency when the DSP shares memory
with other cores (e.g., Cortex-M33) or DMA peripherals.
With this change, applications can now use sys_cache_data_flush_range()
and sys_cache_data_invd_range() to ensure cache coherency in shared
memory scenarios.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
For STM32F446, F469, F479 and F7x, add the clk48 node in the dtsi.
This allows configuring the clock source of the CLK48 clock.
It is necessary to add it for the SDIO peripheral that can have either
SYSCLK or CLK48 as clock source.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
On STM32F446, F469, F479 and on STM32F7x, the CK48M mux can have either
PLL Q or PLLSAI P as input. Adds the support for the PLLSAI P input in
the driver.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Move get_ck48_frequency function outside of the #if STM32_PLL_ENABLED
because it should be usable even if the main PLL is not used. The mux
can indeed be used with PLLI2S.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
With the new PLL bindings, fixes a few board dts and overlays
that are missing some properties.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit updates the STM32Fx clock driver to add complete support for
all PLLs for all SoCs.
Supports all outputs and additional divisors:
- PLL-DIV-R
- PLLI2S-P
- PLLI2S-DIV-Q
- PLLI2S-DIV-R
Adds global checks to make sure that all:
- All PLLs share the same source clocks
- All PLLs share the same M-Divisor (on applicable SoCs)
- Both div-X and div-divX are defined (on applicable SoCs)
Functions get_plli2s_source and get_plli2ssrc_frequency are added to make
sure that PLLI2S can be used even if PLL is not defined.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add some missing clock sources and reorganize them to class the PLL outputs
together for STM32F4 and F7.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For all STM32F2, F4 and F7, use the new binding instead of the various ones
previously defined.
For F411 and F446, this removes the need to define the PLLI2S since it is
already included in F401.
For F7, this commit also adds the PLLI2S that was missing.
Also update post-div-x properties for some boards and overlays.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
STM32F2, F4 and F7 have up to 3 PLLs: PLL, PLLI2S and PLLSAI. These PLLs
are very similar, the principal differences are which outputs are available
for which PLL of each SoC.
Instead of having a large number of files to describe all the possible
very similar variants, use one single binding to rule them all.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The Pico SDK expects a transfer count (items), not a byte count. The
driver incorrectly passed the byte size, causing buffer overflows on
16-bit and 32-bit transfers.Fix this by storing the transfer width in
the channel configuration and dividing the block size by that width
to calculate the correct transfer count.
Fixes#99435
Signed-off-by: Ashirwad Paswan <ashi06712@gmail.com>
Moving the reset of ltpim hw ip at the beginning of
sys_clock_driver_init to improve the reliability of lptim hw
configuration sequence.
Signed-off-by: Alessandro Manganaro <alessandro.manganaro@st.com>
Add ewm dts node for mimxrt1170.
Enable ewm clock for frdm_mcxe247.
Enable wdog for frdm_mcxe247 and frdm_ke15z.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
Set the background color to 0xFF (white) in case of ARGB_8888
framebuffer format so that it is same for all formats except
AL88 and MONO.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Switch SDL buffers from SDL_PIXELFORMAT_ARGB8888 to
SDL_PIXELFORMAT_BGRA32. BGRA32 is platform endianness independent
description, defined as below:
Byte 0 Byte 1 Byte 2 Byte 3
7......0 15.....8 23....16 31....24
Bbbbbbbb Gggggggg Rrrrrrrr Aaaaaaaa
The driver is then updated in order to ensure that all buffers,
given via a PIXEL_FORMAT_ described format are properly converted
into the SDL_PIXELFORMAT_BGRA32. At the same time endianness
conversion code is also added in order to avoid taking assumption
that the running platform is little-endian and ensure that data
are properly read as expected.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
The RGB888 colors generated leads to having
byte0 - R
byte1 - G
byte2 - B
while the RGB888 is usually described as B - G - R
going from byte0 to byte2.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
The format currently expected by devices and sample display
application for BGR_565 is actually RGB_565 format with bytes
swapped (not B / R swapped). That is:
PIXEL_FORMAT_RGB_565:
* @code{.unparsed}
* 7......0 15.....8
* | gggBbbbb RrrrrGgg | ...
* @endcode
current PIXEL_FORMAT_BGR_565:
* @code{.unparsed}
* 7......0 15.....8
* | RrrrrGgg gggBbbbb | ...
* @endcode
This is explained in both st7796s display driver but also is
what is generated by the sample display application. As a video
format (ex: V4L2), such format is not mentioned as BGR (for
which R and B are swapped) but RGB_565X.
Within the whole Zephyr tree, rename the curremt BGR_565 format
into RGB_565X in order to emphasis that this is a byte swapped
format rather than a B/G component swapped format.
This also correct the description of the format in display.h
file, which wasn't correct based on what was being used by
display driver or sample display app.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
This commit adds the MikroE MCP251xFD Click shields under the same
assignees as other of the CAN driver based shields.
Signed-off-by: Stephan Linz <linz@li-pro.net>
The documentation now contains an introductory section covering
the possible variants of this shield. Furthermore, the existing
documentation for the MikroElektronika MCP2518FD click shield
has been enhanced with additional WEB references and the missing
picture.
Signed-off-by: Stephan Linz <linz@li-pro.net>
MikroElektronica offers various click shields, all based on the MCP251xFD
chip family. These include, for example, the MCP2517FD and MCP251863. All
of these chips are software compatible, meaning they can be used with the
same driver.
This preparation makes it possible to introduce additional click shields,
each with their own name. These do not differ in terms of functionality
and handling, so a separate directory for each additional "similar"
module is not necessary. Only an additional DTS overlay and documentation
need to be added.
In addition, missing copyright strings have been added or their labeling
has been adapted to the current guidelines.
Signed-off-by: Stephan Linz <linz@li-pro.net>
cmd_blob_target() always returned 0 even when the target list was
full, making error checks at call sites unreachable.
Return a proper error code when no more targets can be added so
callers can correctly detect and handle the failure.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Update the HW models module to:
4d11a73d62bf999205f16de21a0ef675501f5b21
Including the following:
4d11a73 makefile: Check for more types of build warnings
e53f8db hal: Disable unused-parameter warning when building hal files
5dfba9f RADIO: Avoid 2 shadow redefinition warnings
4a4f979 nrf_hack: Avoid a shadowed redefinition warning
4b9e63b misc: Fix a couple of signedness comparison warnings
d46094f CRACEN: Fix an unused parameter warning
1cf2b04 CLOCK: Fix prototype and one warning
2dab612 nrf_clock: Select header based on symbol instead of platform
0b45a30 54 CRACEN: Make it clear that fallthrough is intentional
7945bf8 GRTC: Add PASTCC model
0a997e5 nrf_hack: Trivial refactoring to remove duplicate code
f328e9b cmake: Add build defines to nrfx library
3824f9c hal: nrf_common: Add repl. for nrf_address_{bus,slave}_get()
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This workflow used to host the "empty" description check and had to
rerun on PR title edit, but that has been moved to into the (faster) dnm
workflow in db18e4c507. Drop the "edited" trigger from this one as it's
not needed anymore.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
On the it51xxx soc, the psa/its twister test was failing because
there is no storage partition defined. This change ensures the
flash erase function in the psa/its test only runs if fixed
partition labeled 'storage_partition' exists.
Tested with:
- west twister -p it51xxx_evb/it51526aw \
-s secure_storage.psa.its.secure_storage.custom.both
- west twister -p it51xxx_evb/it51526aw \
-s secure_storage.psa.its.secure_storage.custom.store
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
This renames the dtsi files in the dts/vendor/nordic
to include the cpuapp in the filename.
At the same time it updates the inclusion of these files
to include the vendor in the path because the same filenames
exists in both:
dts/vendor/nordic
dts/arm/nordic
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Rename all dtsi files for Nordic boards for non secure builds
to have a _ prefix before "ns" to increase readiblity.
At the same time, change the path to include the arm
folder in order to be able to differentiate with the
vendor folder which has similar files.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
