Bind registers to the local variable in the ti_adc_init() function
after mapping the address space via DEVICE_MMIO_MAP.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
Allow using other references by removing the hard requirement on it being
internal. To be able to use internal voltage, the DT property ti,vrefp can
be used, otherwise it is ignored.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
When the LLEXT subsystem detects that a symbol is marked for export from
the main image, but the symbol group in which the export belongs is not
enabled, add a marker in a special section in addition to not placing the
symbol in the final export table.
Add a post-build script which consumes the special section as post-build to
dump information about all discarded symbols in a build artifact, and also
check for common errors (missing Kconfig symbol / improperly named groups).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Move ELF-related utilities from the "llext_prepare_exptab" script to a
dedicated "llext_elf_toolkit" which can be reused by other LLEXT scripts.
While at it, also improve documentation of class SectionDescriptor.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Now that the RISC-V architecture supports returning from
z_riscv_fatal_error(), the self-aborting essential thread
test no longer needs to be skipped.
Signed-off-by: Firas Sammoura <fsammoura@google.com>
The Zephyr kernel's generic `z_fatal_error()` function, which is
invoked by architecture-specific fatal error handlers, is not
guaranteed to be non-returning. For instance, it can return if an
essential thread aborts itself.
The RISC-V port's `z_riscv_fatal_error` function was previously
inconsistently marked as `FUNC_NORETURN`. This commit removes this
attribute to align with the core kernel behavior, allowing the
function to return if `z_fatal_error()` returns.
Specific changes include:
- Removed `FUNC_NORETURN` from `z_riscv_fatal_error` declarations
in `fatal.c` and `kernel_arch_func.h`.
- Removed `CODE_UNREACHABLE` after the call to `z_fatal_error`
within `z_riscv_fatal_error` as it can now return.
- In `isr.S`, changed `tail z_riscv_fatal_error` to
`call z_riscv_fatal_error` in the exception entry, followed by
a jump to `check_reschedule` to handle the return path.
- Added `CODE_UNREACHABLE` at call sites of `z_riscv_fatal_error`
(e.g., in `z_riscv_fault`, `z_check_user_fault`,
`arch_irq_spurious`) where the context ensures the call is
effectively terminal.
Signed-off-by: Firas Sammoura <fsammoura@google.com>
Update the IMSIC driver to use the renamed micsr_* indirect CSR
access functions instead of the old icsr_* names.
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Rename the indirect CSR access functions from icsr_* to micsr_* to
explicitly indicate they operate using M-mode CSRs (MISELECT/MIREG).
This prepares for future S-mode support where sicsr_* functions using
SISELECT/SIREG would be needed. The naming follows the RISC-V
convention of using 'm' and 's' prefixes to distinguish privilege
levels (e.g., mstatus/sstatus, mie/sie).
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
add dt_node_array_prop_has_val function and
extend dt_nodelabel_array_prop_has_val to be
used with string-arrays.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Add check for ACL connection before submitting recycled.
Since ISO and SCO connections do not trigger the disconnected
callback, nor affects e.g. advertising, they should not
trigger the recycled callback.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Enabled I2C6 on i.MX 943 EVK boards for Cortex-A55, there is a I2C bus
expandor PCA9544APW which address is 0x77 on this bus.
Could use the following command to build a shell application:
west build -p always -b imx943_evk/mimx94398/a55 \
samples/subsys/shell/shell_module/ -DCONFIG_I2C_SHELL=y -DCONFIG_I2C=y
Add use I2C shell command to probe the device on the bus:
uart:~$ i2c scan i2c@426c0000
Add could find 0x77 on this bus.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
On qemu_x86, the size of a coverage report entry for certain testcases can
exceed 32KiB, resulting in the "No memory available to continue dump" error
message in the gcov data output and the subsequent twister error in parsing
the data:
ERROR - General exception: non-hexadecimal number found in fromhex()
arg at position 0
This commit increases the gcov heap size to 64KiB to work around the above
issue.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
ataes132a_state is an array of CRYPTO_MAX_SESSION length.
This constant must be used when iterating over its elements
and not ATAES132A_AES_KEY_SIZE (even they having the same
value).
Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
Add a board-specific overlay for the Silicon Labs slwrb418x
to enable the blinky_pwm sample with the correct PWM
configuration.
Signed-off-by: Phuc Hoang <donp172748@gmail.com>
The settings and calculations are often done in micro or nano seconds
and the result is not always shown. So, just add the period cycles as
part of the error message to get the calculated value.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
Failure to clear ct->ct_notify[event_id] when avrcp_prepare_vendor_pdu
fails, leading to an error return if ct->ct_notify[event_id].cb != NULL
during the next notification registration.
Signed-off-by: Lu Jia <jialu@xiaomi.com>
Add missing return codes for can_add_rx_filter(), can_add_rx_filter_msgq(),
and can_recover() API calls.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The interrupts should only be enabled after the START condition is set
by either writing to TWIHS_THR(for writes) or by writing TWIHS_CR_START
to TWIHS_CR. Otherwise, the TXCOMP interrupt may fire before the driver
is ready, causing invalid reads and the semaphore to deadlock.
Link: https://ww1.microchip.com/downloads/en/DeviceDoc/SAM-E70-S70-V70-V71-Family-Data-Sheet-DS60001527D.pdf
Signed-off-by: Alex Kar <github@alexkar598.dev>
In uart_stm32_async_rx_buf_rsp(), when the provided RX buffer is not
located in non-cacheable memory, the function would return -EFAULT
while still holding the IRQ lock acquired at the start of the critical
section. This causes a system deadlock as interrupts remain disabled
indefinitely.
The nocache validation check has been moved outside the critical
section to ensure proper error handling. The check is performed before
acquiring irq_lock(), maintaining the same validation behavior while
preventing the lock from being held during the early error return.
Fixes a bug where async UART RX operations with improperly
placed buffers would hang the system.
Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
For othre Nordic targets we are chosing and enabling the controller
for the dts/arm/nordic DTS files. But this was not how it was added
for the nrf54lm20.
Let's move these to the same place, for consistency, and so that it
is also enabled in the same way for the simulated nrf54lm20bsim
(whose board file includes these same dtsi files)
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Use the same HAL header for the simulated 54LM20 as for the 54L15,
just like we do for real targets.
Note this ifdef is the last one, and therefore the real targets
have already been caught before.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Only 511 kB of RAM is available for usage currently
on nRF54LM20A. The non-secure variant used the full 512
which causes boot loops. Reduce the non-secure ram down to
252 to reduce below the 511 kB while still following
the 4 kB page alignment requirements in TF-m
Signed-off-by: Dag Erik Gjørvad <dag.erik.gjorvad@nordicsemi.no>
Add CONFIG_SOC_FAMILY_INFINEON_PSOC4 conditional for Cy_SCB_I2C_Enable()
function call. PSOC4 devices require passing the I2C context parameter,
while other Infineon families do not.
This enables I2C driver support for PSOC4-based boards including
cy8ckit_041s_max.
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
Fix submit condition for non-control transfer. Do submit when any
of the following conditions is met:
1. Transfer buffer (net_buf) is full
2. Last packet size is less than mps
3. Isochronous transfer
USB mass may request C1 for sector size (512 bytes)-aligned and C2
for CBW (13 bytes).
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
With USBD and HSUSBD re-organized, SoC must have USBD and HSUSBD at
the same time to pass compile. However, M2L31 just has USBD and meets
compile error with HSUSBD unsupported. To avoid adding too many
conditional (#if condition) code for the error, create one dummy
HSUSBD device definition for M2L31 to pass compile.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
For HSUSBD, Control transfer with Data OUT stage will break. This is
caused by FIFO flush which cannot be done timely even though in Setup
token interrupt handler. For this, error recovery with FIFO is not
done in Setup token/packet handler and rely on USB reset handler to do
it as catch-all.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Some SoC series allow USB controller to be disabled temporarily
on unplug, and then enabled back on re-plug. Add support for such
configuration option in DT and UDC driver.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
