Commit graph

126,787 commits

Author SHA1 Message Date
Erwan Gouriou
9e46716d09 soc: stm32: stm32n6: Define MPU_GAP_FILLING also with USERSPACE
MCU_GAP_FILLING is advised on ARMv8 based platforms to prevent from
against attacks that attempt to execute malicious code from SRAM.
It is enabled by default when USERSPACE is disabled, enable it
also when enabled.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-09-17 14:54:28 +02:00
Hieu Nguyen
e80c43af0b samples: drivers: counter: Add Counter support for Renesas RZ/T2M, N2L
Add Counter sample support for Renesas RZ/T2M-RSK, RZ/N2L-RSK

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-09-17 14:53:20 +02:00
Hieu Nguyen
f540c50975 tests: drivers: counter: Add Counter support for Renesas RZ/T2M, N2L
Add Counter test support for Renesas RZ/T2M-RSK, RZ/N2L-RSK

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-09-17 14:53:20 +02:00
Hieu Nguyen
f724a90db6 boards: renesas: Add Counter support for Renesas RZ/T2M, N2L
Add Counter support for board Renesas RZ/T2M, N2L

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-09-17 14:53:20 +02:00
Hieu Nguyen
37759c2147 dts: renesas: Add Counter support for Renesas RZ/T2M, N2L
Add CMTW nodes to Renesas RZ/T2M, N2L

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-09-17 14:53:20 +02:00
Hieu Nguyen
048d7ed22f drivers: counter: Add Counter support for Renesas RZ/T2M, N2L
Add Counter driver support for Renesas RZ/T2M, N2L

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-09-17 14:53:20 +02:00
Benjamin Cabé
142f6af4c3 doc: conf.py: fix pdf build
An earlier fix (0871c7e) meant to remove warnings due to index and
index-tex defining overlapping table of contents actually broke the PDF
build. Fix it by making sure index-tex is set as root_doc when building
for LaTeX/PDF.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-09-17 14:52:58 +02:00
Andrej Butok
65d7c7c598 dts: nxp: Use DT_SIZE_M/K() for size
Use DT_SIZE_M() and DT_SIZE_K() for DTS size property
for better readability.

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-09-17 11:17:51 +01:00
Andrej Butok
cd1b6c37f2 dts: nxp: Use DT_FREQ_M/K() for frequency
- Use DT_FREQ_M() and DT_FREQ_K() for DTS frequency property
for better readability.
- Include freq.h in dts to use DT_FREQ_M/K()

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-09-17 11:17:51 +01:00
Piotr Kosycarz
55675e861a samples: sysbuild: hello_world: verify output from both uarts
Beside main core, check output from remote core console.
Checking second console will work only for nordic boards
(as the pattern to get second uart interface is known).
For other boards (with different interface naming),
the test will check only provided console,
which is the same behavior as harness:console.

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
2025-09-17 11:16:40 +01:00
Devin Jaenicke
ba42b5db21 drivers: serial: silabs: fix to allow euart to function on bgm220s
The efr32xg22 series does not support the same async operations as other
efr32 series chips. This change allows the eusart driver to function.

Signed-off-by: Devin Jaenicke <devinjaenicke@glassboard.com>
2025-09-17 11:16:17 +01:00
Devin Jaenicke
d2600ba839 soc: silabs: Add support for bgm220sc22hna2 module
This commit adds support for the Silicon Labs BGM220SC22HNA2 SoC.

Signed-off-by: Devin Jaenicke <devinjaenicke@glassboard.com>
2025-09-17 11:16:17 +01:00
Swift Tian
bf5a0a7c62 samples: mspi: update log print for CI
Use app level log instead of INF log from module to avoid complex regex.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2025-09-17 11:16:09 +01:00
Swift Tian
4d977f0de6 samples: drivers: memc: update memc example yaml for CI twister
Add another mspi section and filter by psram0 dt alias.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2025-09-17 11:16:09 +01:00
Swift Tian
4432b6d0b0 drivers: flash: mspi: fix compile warning in is25 driver
Fix warning when no cache handling enabled.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2025-09-17 11:16:09 +01:00
Swift Tian
619b2d2ec6 drivers: mspi: optimize ambiq mspi controller
With CONFIG_LOG=n and MSPI controller on, unused variable warning
is elimiated.
Now able to be used without CONFIG_PM_DEVICE.
Fixed a bug where dev_id may be null with pm device runtime auto.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2025-09-17 11:16:09 +01:00
Mark Wang
70c965d33d bluetooth: l2cap: accept the default flush timeout (0xFFFF) in conf_rsp
Some headsets reply conf_rsp with flush timeout (0xFFFF) even conf_req
don't configure the flush timeout, stack should accept it.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-09-17 11:16:03 +01:00
Mark Wang
811c5eb64b bluetooth: l2cap: support the classic l2cap rx flush timeout
add one Kconfig `BT_L2CAP_RX_FLUSH_TO` to configure the minimum L2CAP RX
flush timeout accepted during processing peer's l2cap flush timeout
configuration.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-09-17 11:16:03 +01:00
Khaoula Bidani
1d6b6759aa drivers: i2c: stm32: Fix STM32 I2C hang on read
ensure LL_I2C_TransmitData8() is always called when
TXIS is set, even if read_processed() returns an error.
This prevents the peripheral from clock-stretching
indefinitely and blocking the I2C bus when the master
reads from the slave.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-09-17 10:07:48 +02:00
Manuel Argüelles
936876b545 drivers: intc: nxp: drop soc name from siul2 eirq driver
The SIUL2 external interrupt driver is a native implementation usable
across all NXP SoCs with SIUL2 IP. Remove the "S32" prefix to allow
clean reuse by other families.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2025-09-17 10:07:31 +02:00
Manuel Argüelles
5a0e0c924d drivers: gpio: nxp: drop soc name from siul2 driver
The SIUL2 GPIO driver is a native implementation usable across all
NXP SoCs with SIUL2 IP. Remove the "S32" prefix to allow clean
reuse by other families.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2025-09-17 10:07:31 +02:00
Manuel Argüelles
0f0cad00d4 drivers: pinctrl: nxp: drop soc name from siul2 driver
The SIUL2 pin control driver is a native implementation usable across
all NXP SoCs with SIUL2 IP. Remove the "S32" prefix to allow clean
reuse by other families.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2025-09-17 10:07:31 +02:00
Cheng Chang
31f36fdbb8 bluetooth: host: l2cap: fix issue that can't get chan by psm
when role is server and try to get chan by psm in application, it
works fail because chan do not store psm.

Signed-off-by: Cheng Chang <cheng.chang@nxp.com>
2025-09-17 10:07:12 +02:00
Hui Bai
af9f889135 samples: net: wifi: Add TLSv1.3 support in wifi example
Add TLSv1.3 support in wifi example for RW612 and IW610.

Signed-off-by: Hui Bai <hui.bai@nxp.com>
2025-09-17 10:06:54 +02:00
Quy Tran
009144a3b2 tests: drivers: build_all: Add Renesas RA video driver build
Enable video driver build for Renesas RA8D1

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2025-09-17 10:06:34 +02:00
Thao Luong
927f5876c8 boards: renesas: ek_ra8d1: Update document for using Camera
Add SW1 configuration for using Camera Exapansion Port (J59)

Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
2025-09-17 10:06:34 +02:00
Khanh Nguyen
5ed15487b4 samples: video: Add CEU support for Renesas RA boards
Add EK-RA8D1 board support for capture and capture_to_lvgl samples

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-09-17 10:06:34 +02:00
Khanh Nguyen
d37590f1c2 boards: shields: Support OV7670 DVP 20-pin shield on EK-RA8D1 board
Support OV7670 DVP 20-pin shield on the EK-RA8D1 board

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-09-17 10:06:34 +02:00
Khanh Nguyen
9d830894d6 boards: renesas: Enable CEU video capture support on EK-RA8D1
- Add CEU pin configuration to ek_ra8d1-pinctrl.dtsi
- Enable CEU node and Arducam 20-pin connector in ek_ra8d1.dts
- Configure PWM3 as external XCLK via pwm-clock node
- Update board YAML to declare video support

Signed-off-by: Duy Vo <duy.vo.xc@bp.renesas.com>
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-09-17 10:06:34 +02:00
Khanh Nguyen
df0bbeb351 dts: arm: renesas: Add CEU nodes for RA8D1 and RA8M1 SoCs
Add CEU to r7fa8d1xh.dtsi and r7fa8m1xh.dtsi

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-09-17 10:06:34 +02:00
Khanh Nguyen
e9c99655d3 include: dt-bindings: renesas: Add RA CEU pin definitions
Add pin definitions required by the RA Capture Engine Unit

Signed-off-by: Duy Vo <duy.vo.xc@bp.renesas.com>
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-09-17 10:06:34 +02:00
Khanh Nguyen
2784257582 drivers: video: add support for Renesas RA CEU driver
Add support for the Renesas RA Capture Engine Unit (CEU),
including driver source files, Kconfig options, and DTS bindings.

- Add initial implementation of the RA CEU driver
- Add dedicated Kconfig and CMake integration
- Provide Devicetree bindings for the RA CEU
- Update module Kconfig to include the new driver

This enables image capture functionality using the CEU peripheral
on Renesas RA series MCUs.

Signed-off-by: Duy Vo <duy.vo.xc@bp.renesas.com>
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-09-17 10:06:34 +02:00
Jiafei Pan
77b000faaa requirements: update spsdk version
Update spsdk version to fix dependency confliction with other software.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-09-17 08:48:05 +02:00
Jonas Berg
c825b95dc5 boards: Add DFRobot Beetle RP2040 board
The product image is from https://www.dfrobot.com/product-2615.html

Signed-off-by: Jonas Berg <jonas.s.t.berg@gmail.com>
2025-09-17 08:46:53 +02:00
Jonas Berg
ad9d153020 Boards: Add Adafruit Feather RP2040 LoRa board
Add support for the Adafruit Feather RP2040 LoRa board.
The image is from https://learn.adafruit.com/assets/120298, with
the license CC BY-SA 3.0.

Signed-off-by: Jonas Berg <jonas.s.t.berg@gmail.com>
2025-09-17 08:46:42 +02:00
Bill Waters
db410b754c drivers: pwm: ifx_tcpwm: mark unused args
There are two functions with unused arguments
that were not marked.

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2025-09-17 08:45:24 +02:00
Fin Maaß
76c1bc02e1 sd: evaluate constants first
evaluate constants first, so the
compiler can optimize it.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-09-17 08:45:15 +02:00
Mahesh Mahadevan
a053665817 drivers: timer: mcux_os_timer: Improve the overflow handling logic
Clear the remanining ticks value.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-09-17 08:44:31 +02:00
Neil Chen
aeb7cad1ef boards: frdm_mcxc444: Update TPM clock source
1.Update TPM clock source to MCGPCLK(48MHz).
2.Verified tests/drivers/pwm/pwm_api.

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-09-17 08:44:15 +02:00
Albort Xue
d5f4976f71 soc: nxp: imxrt10xx: update range of DCDC output voltage.
According to the datasheet, NXP recommands a DCDC output
voltage range of 0.925V to 1.3V.

Signed-off-by: Albort Xue <yao.xue@nxp.com>
2025-09-17 08:44:07 +02:00
Michał Bainczyk
81db3fff8f drivers: flashdisk: fix value returned from disk_flash_access_write
Change the value returned from disk_flash_access_write to return
the return code instead of a hardcoded zero.

Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
2025-09-17 08:43:41 +02:00
Jason Yu
affb836880 drivers: hwinfo: mcux_src_rev2: Update to support MIMXRT118X
Add RT118X support

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-09-17 08:43:16 +02:00
Jason Yu
9a2e27e2c2 drivers: hwinfo: mcux_src_rev2: Change it to native driver
The reset source is SOC specific, MCUX SDK SRC driver is
also SOC specific, it doesn't mask the SOC differences.
So the driver can use SOC macros directly, and handle SOC
differences in the hwinfo driver, not necessary to wrap
MCUX SDK driver.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-09-17 08:43:16 +02:00
Jason Yu
bd10f9301e drivers: hwinfo: mcux_src_rev2: Change to use dts as dependency
Originally the driver is selected if `HAS_MCUX_SRC_V2` is
selected in SOC level kConfig.
Change to use dts to mark the driver is avaiable for some SOC.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-09-17 08:43:16 +02:00
Qiang Zhang
93edbeba94 drivers: input: Adapt to the latest SDK kpp driver
Get the KPP_keyPressScanning status value
to determine the stability of key data.
Update read_keys_old data update timing.

Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>
2025-09-17 08:43:05 +02:00
Lucien Zhao
296ca350d6 samples: drivers: i2s: output: add rt1180 support
- add i2s_output case support on cm33/cm7 core
- remove 1180 platform in i2s_api/speed cases

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-09-17 08:42:44 +02:00
Lucien Zhao
30d5243ed4 samples: drivers: i2s_codec: support sai1 codec function on RT1180
- add imxrt_audio_codec_pll_init function in soc.c
- add sai1 pin configuration
- Verify i2s_codec case on cm33/cm7 core

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-09-17 08:42:44 +02:00
Lucien Zhao
826a2eee56 drivers: i2s: i2s_mcux_sai: update driver to support RT1180
add CONFIG_SOC_SERIES_IMXRT118X macro to support
audioPllConfig initialization

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-09-17 08:42:44 +02:00
Lucien Zhao
3383026a9a dts: arm: nxp: add sai/blkctrl_ns_aon/blkctrl_wakeup instance
add 4 sai instances
add blkctrl_ns_aon/blkctrl_wakeup and related binding yml

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-09-17 08:42:44 +02:00
Biwen Li
b50b091e9c boards: nxp: imx943_evk: enable m70 and m71
Enable m70 and m71 for imx943_evk

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-09-17 08:42:32 +02:00