The arrays used for M-mode Physical Memory Protection (PMP),
specifically for the stack guard feature (CONFIG_PMP_STACK_GUARD),
were previously sized using the hardcoded PMP_M_MODE_SLOTS macro,
defined as 8. This affected arrays in both the _thread_arch
struct (m_mode_pmpaddr_regs, m_mode_pmpcfg_regs) and local
variables within the z_riscv_pmp_stackguard_disable function.
This commit changes the array sizing to use the Kconfig option
CONFIG_PMP_SLOTS. This option reflects the total number of PMP
slots available and configured for the target hardware.
Using CONFIG_PMP_SLOTS ensures these arrays are dimensioned
according to the system's actual capabilities, providing better
flexibility and correctness over a fixed size.
The PMP_M_MODE_SLOTS macro definition has been removed from
thread.h as it is no longer used.
Signed-off-by: Firas Sammoura <fsammoura@google.com>
This makes userchan transport behavior similar to other HCI
transports (eg IPC). Improved logging gives clear overview
of what RX events are discarded helping for configuration
tuning.
Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
MCUBOOT requires LTO to be enabled, while using code relocation
forces switching it off. When `__ramfunc` is used, LTO can also
be used. Then the `cache_retain_and_sleep` function will work
correctly, but slightly slower.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Add missing SoC header include required by memory region assertion
to adc_nrfx_saadc and i2s_nrf_tdm shims.
Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
Add a new sample demonstrating various ways of performing CoAP uploads
with the CoAP Client library:
* short uploads with payload pointer
* short uploads with payload callback
* block transfer uploads with payload pointer
* block transfer uploads with payload callback
The resource names have been chosen so that the sample can run out of
the box against the Zephyr's CoAP server sample.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add an optional payload callback field to the coap_client_request
structure, allowing the application to provide blocks of payload
interactively during the resource upload, instead of having to provide
entire payload in a single contigunous memory space.
If registered, the CoAP client library will call the payload callback
whenever a new PUT/POST message is being generated (note this is also
true for retransmissions) instead of using the payload pointer/length.
If the payload callback is NULL, then the library operates as usual.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
During block uploads, the server may respond with Block 1 option with
a smaller block size than currently used (so called block size
negotiation). The CoAP client however did not read the Block 1 option
from the response, therefore ignoring the server request to lower the
block size.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
This check is totally wrong, min-residency-us and exit-latency-us are
not related to each other at all except that the end of the residency
period occurs when the exit starts, so they are totally orthogonal
values and should not be checking if one is less than the other or
anything like this. Even in the code for the default policy manager,
they are added together, so this check is incompatible / in disagreement
with that code, so it should be removed.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The `ok` state is deprecated and very few files are using this.
The DTS spec also does not have this value.
This PR removes this value once and for all.
Signed-off-by: Kyle Micallef Bonnici <kylebonnici@hotmail.com>
If there are still bytes in the RX buffer, trigger another
MODEM_PIPE_EVENT_RECEIVE_READY event.
Signed-off-by: Ryan Erickson <ryan.erickson@ezurio.com>
Introduce Bouffalo Lab L1C cache management functions
This allows invalidating instructions and data on
BL60x and BL70x
Signed-off-by: Camille BAUD <mail@massdriver.space>
This commit adds hwinfo to supported list of the following boards:
- MAX32655EVKIT
- MAX32657EVKIT
- MAX32690EVKIT
- MAX78002EVKIT
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
To avoid issues with multiple calls to fetch the USN returning garbage
data, memoize the returned USN value and re-use it on subsequent calls.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
- Configure BLOCK count by using kconfig option
'EXTRA_BLOCKS' instad of fixed value. This allows user to
customize the RAM usage based on their platform.
- Keep the PCM data in flash to avoid large RAM usage.
- Refine the sample to get the SAMPLE_BIT_WIDTH
and BYTES_PER_SAMPLE from Kconfig options.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add pinmux configuration to enable the can in zephyr.
Using the following pins:
- CAN2_TX, GPIO_IO25
- CAN2_RX, GPIO_IO27
Signed-off-by: Aziz Sellami <aziz.sellami@nxp.com>
Signed-off-by: Jiafei Pan <jiafei.pan@nxp.com>
Add pinmux configuration to enable the can in zephyr.
Using the following pins:
- CAN2_TX, GPIO_IO25
- CAN2_RX, GPIO_IO27
Signed-off-by: Aziz Sellami <aziz.sellami@nxp.com>
Signed-off-by: Jiafei Pan <jiafei.pan@nxp.com>
STM32L5xx series shares several DMA configurations with
the other platforms. These changes aim to enable platform
specific DMA configuration and align them to other platforms.
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
This change introduces stm32l5xx clock definitions and separates
it from L4xx series. This change comes because of CCIPR missmatch
of SAI between L4xx and L5xx series.
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Retrieve the value of SYS_CLOCK_HW_CYCLES_PER_SEC from the osc node in
the RZ/A3UL devicetree.
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Add Clock Control nodes to Renesas RZ/A3UL, V2L devicetree
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Add Clock Control driver support for Renesas RZ/A3UL, V2L
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Fix SDMMC initialization by starting with 1-bit bus mode and
properly configuring wide bus operation after HAL
initialization.
The SDMMC protocol requires initialization to start in
1-bit mode before switching to wider bus widths.
Previously, the driver attempted to initialize directly
with the target bus width, which could cause later read/write
failures.
Changes:
- Initialize with SDMMC_BUS_WIDE_1B instead of target bus width
- Add HAL_SD_ConfigWideBusOperation() call if needed after
successful init
- Add error logging for wide bus configuration failures
Fixes potential SDMMC read/write failures issues on STM32 platforms.
Signed-off-by: Shan Pen <bricle031@gmail.com>
Cast elf32_off/elf64_off to uint64_t and use %llu format specifier
to ensure compatibility with both 32-bit and 64-bit platforms.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Use %zu format specifier for size_t type to ensure compatibility with both
32-bit and 64-bit platforms.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
bt_iso_chan_send and bt_iso_chan_send_ts would log
twice for each TX, which is unncessary. LOG_DBG statements
include the function name by default, so the 2nd log
statement was unncessary, and were removed.
Added logging of the ts in bt_iso_chan_send_ts which
would still make it possible to tell the 2 apart,
even if CONFIG_LOG_FUNC_NAME_PREFIX_DBG=n.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
