silabs_s2 uses simplicity_sdk hal library, which already have by default
a zero latency IRQs mechanism with a hardcoded value. In order to be
aligned with simplicity_sdk, we need to activate Zero Latency IRQ in
Zephyr by default. The level (2) depends on the hardcoded
value in simplicity_sdk (CORE_ATOMIC_BASE_PRIORITY_LEVEL). Without this
fix, if you use an IRQ with a priority of 0 or 1, irq_lock() and
irq_unlock() have no effect for this IRQ.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Add Clock Control support for board RZ/G3S-SMARC
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Add Clock Control driver support for Renesas RZ/G3S
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
In the current implementation, when `gpio_ra_pin_interrupt_configure`
is executed, the existing settings made by `gpio_ra_pin_configure`
are erased.
A read-modify-write method will be used to preserve the settings.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
@ithinuel will be continuing to help with reviews on
Arm and Arm64 arch/platform so adding him as collaborator.
Also adding me @wearyzen as collaborator for Arm64 to
help with reviews.
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
Building with clang warns:
drivers/sensor/st/ism330dhcx/ism330dhcx.c:107:19: error: unused function
'ism330dhcx_reboot' [-Werror,-Wunused-function]
static inline int ism330dhcx_reboot(const struct device *dev)
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Building with clang warns:
drivers/dma/dma_emul.c:73:20: error: unused function
'dma_emul_xfer_is_error_status' [-Werror,-Wunused-function]
static inline bool dma_emul_xfer_is_error_status(int status)
^
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
This SoC has an external XCACHE controller for CPU0
instruction and data bus.
Add code to enable the data cache. Instruction cache
is already enabled by SystemInit.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
When using the interrupt UART API, it is expected that the driver will
call the callback function repeatedly while TX interrupt is enabled.
However that is not necessarily the case with the FIFO is enabled.
If the application calls uart_fifo_fill() each time with only one byte
of data, the TX interrupt will never trigger. This is because the 1/8 TX
interrupt trigger threshold is never reached. For this reason, the
callback function should be called multiple times from software as
needed.
Fixeszephyrproject-rtos/zephyr#85479
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
Allow specifying the Kconfig file path in the environment (in practice
in the `conf.py` file), to allow the script to correctly find Kconfig
roots that aren't in the expected `"modules" / name / "Kconfig"`
location.
This is required since in the normal build system, the
`ZEPHYR_{name_var}_KCONFIG` cmake symbol can be constructed arbitrarily
in `modules.cmake`.
Signed-off-by: Jordan Yates <jordan@embeint.com>
This shield is compatible with all XIAO boards. Tested with 2 of them:
* xiao_ble
* xiao_esp32s3
Extend sample.yaml for integration testing with both, so there is coverage
across two very distinct SoC vendors and architectures.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move 'tags' and 'modules' into common section in samples.yaml, so test
definitions are deduplicated a bit.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
When tested with xiao_esp32s3 + seeed_xiao_round_display main stack is
occupied with 3504 bytes (checked with 'kernel thread stacks' command).
Increase main stack size from 2k to 4k in order to make this sample work at
runtime.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Mark interfaces on XIAO header that are supported by each board. This
allows to filter by them (with depends_on) when running twister.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Change adds bsim tests with CONFIG_BT_LONG_WQ=n to ensure correct
behavior. Change uses host/gatt/ccc_store test.
Change also switches to using more unique simulation ID in the test
scripts.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Change adds bsim tests with CONFIG_BT_LONG_WQ=n to ensure correct
behavior. Change uses host/security/ccc_update test.
Change also switches to using more unique simulation ID in the test
scripts.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Change allows performing ECDH operations through system workq. This is
done to allow reducing memory consumption by disabling the long workq on
small SoCs.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
