Add STM32_CPUCLK_SRC_* macros as helper macros to select which source
clock feeds the CPU clock on a STM32N6 SoC.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
For many devices iSerialNumber is not required. The only device class
currently supported in Zephyr that requires iSerialNumber is MSC. If the
serial number is not available then iSerialNumber must be 0. Failure to
read the string descriptor for non-zero iSerialNumber fails USB Command
Verifier Chapter 9 tests.
When USBD_DESC_SERIAL_NUMBER_DEFINE() was used without CONFIG_HWINFO
then it did lead to runtime failure when requesting the string (thus
failing certification).
Fail USBD_DESC_SERIAL_NUMBER_DEFINE() at build-time if CONFIG_HWINFO is
not set to prevent the surprise at runtime. Only define serial number
descriptors if CONFIG_HWINFO is enabled.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
added function to calculate antenna path
based on the antenna permutation index and
total number of antenna paths
Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
SETUP data is unconditionally ACKed by the controller. Other DATA
packets sent to OUT control endpoint 0 (i.e. OUT Data Stage packets
and OUT Status Stage packet) are ACKed by the device only if the
endpoint was enabled with CNAK bit set.
In Buffer DMA mode controller will lock up in following scenario:
* OUT EP0 is not enabled, e.g. OUT Status Stage has finished
* Host starts Control Write transfer, i.e. sends SETUP DATA0 and
device ACKs (regardless if endpoint is enabled or not)
* host sends OUT Data Stage (OUT DATA1)
- software enables endpoint to be able to receive next SETUP data
while host is transmitting the OUT token. If CNAK bit is set
alongside the EPENA bit, the device will ACK the OUT Data Stage.
If CNAK bit is not set, the device will NAK the OUT Data Stage.
When the lockup occurs, from host perspective the OUT Data Stage packet
was successfully transmitted. This can result in host starting IN Status
Stage if there was only one OUT Data Stage packet. This in turn results
in device never getting the DOEPTINT0 SetUp interrupt. Besides just not
getting the SetUp interrupt, any subsequent control transfer won't be
noticed by device at all.
The lockup was first observed while stress testing. The host was issuing
endless sequence of Control Write, Control Read, Control Write, Control
Read, ... commands. When the controller did lock up in Buffer DMA mode,
from host perspective the device was timing out all control transfers.
Avoid the Buffer DMA lockup by setting CNAK bit only when necessary.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Kconfig value LWM2M_ENGINE_MESSAGE_HEADER_SIZE added
an extra headroom for CoAP packet sizes so that
if CoAP Block-Wise transfer block-size is configured
to be same as LWM2M_COAP_MAX_MSG_SIZE, the full
payload block would usually fit to the datagram.
This causes too much confusion to be usable.
CoAP headers and options vary on sizes, and there is
no runtime limitations that we should check the
header size against.
Only real limitation is the CoAP packet size, which
must fit into the UDP datagram with typical DTLS headers.
Only limitation for CoAP block-size then is that
it must fit into the CoAP message with all the headers
and options. But as the option sizes, like path, vary,
it must be checked runtime.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Convert the socket poll logic to use a more lightweight eventfd file
descriptor instead of a socket pair.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This fix uses the stm32h745i-disco openocd configuration instead of the
st_nucleo_h745zi configuration as the latter seems to be broken in
openocd as shipped by zephyr-sdk-0.17.0.
Signed-off-by: Martin Thiede <martin.thiede@accenture.com>
Add CAN support by configuring fdcan1 in the device tree for the M7
core. As with other H7xx boards, it will be clocked by pll2 which is
also turned on.
Updated documentation.
Tested on nucleo_h755zi_q board.
Signed-off-by: Martin Thiede <martin.thiede@accenture.com>
Mention that NEORV32 processor templates are now supported via board
variants and clarify the NEORV32 version compatibility entry.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Update the NEORV32 board documentation to list the supported board targets
and describe how to customize these to match custom NEORV32
implementations.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add a MinimalBoot board variant for the NEORV32 board. The software
configuration of this board matches the NEORV32 "MinimalBoot" processor
template.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Refactor the existing NEORV32 board to become a UP5KDemo board variant for
the NEORV32 board. The software configuration of this board matches the
NEORV32 "UP5KDemo" processor template.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Implement the '.reset' interface in the nrfx-timer driver
to allow the upper layers to use the counter_reset
function.
Signed-off-by: James Roy <rruuaanng@outlook.com>
Implement the '.reset' interface in the native-posix driver
to allow the upper layers to use the counter_reset
function.
Signed-off-by: James Roy <rruuaanng@outlook.com>
Add a counter_reset function to the counter subsystem
to reset the counter value to zero. Introduce
a reset interface at the driver layer to implement
the counter_reset function.
Signed-off-by: James Roy <rruuaanng@outlook.com>
Names the enums declared in `gap.h` and replaces references to them
with Doxygen references (@ref).
Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
The U-Blox M10 seems to interleave UBX and NMEA messages in a way that
confuses the M8 driver leading to missing the same message that directly
follows the UBX part every time (leading to no navigation updates).
As the driver does not parse the UBX blocks during normal operation anyways
it can just be disabled.
Signed-off-by: Jakob Riepler <jakob+zephyr@chaosfield.at>
Disable/enable endpoints even if the new alternate is the same as the
current one, forcing the endpoint to reset to defaults.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Do not report canceled transfers as an error and continue the transfers
regardless of the previous transfer status.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The i3c group address support is rather very incomplete here. Remove
references to it. This could all easily come back when/if group support
comes in.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Move PR body check to a workflow that monitors editing of PRs.
Avoids rerunnin compliance check and other heavy weights workflows on
just an edit of the PR body.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit introduces a new workflow that checks for SHA-pinned GitHub
Actions on pull requests.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Move functions `bt_sco_cleanup()`, `bt_conn_create_br()`,
`bt_hci_connect_br_cancel()`, and `bt_conn_get_dst_br()` from `conn.c`
to `conn_br.c`.
Change the function `bt_hci_connect_br_cancel()` to internal public
function.
Add a header file `conn_br_internal.h`. And declare the function
`bt_hci_connect_br_cancel()` in the header file.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
The flash size is the second part (size) of the first reg value,
not the first part (address) of a nonexistent second reg value.
DT_REG_SIZE get a node's (only) register block size instead
DT_REG_ADDR_BY_IDX .
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Clarifies the use of identity in `bluetooth.h` by specifying whether the
documentation refers to the identity address, i. e. the actual address
`bt_addr_le_t`, or the identity handle, i. e. an index corresponding to
a specific identity address.
Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
Make the zephyr,input-sdl-touch driver be multi instance and add the
possibility to associate it with a display. The input events are only
emitted if the events occured on this display.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
