Commit graph

126,787 commits

Author SHA1 Message Date
Abderrahmane JARMOUNI
caa21ac284 samples: mgmt: hawkbit: add stm32h750b_dk to CI platforms
Add stm32h750b_dk/stm32h750xx/ext_flash_app target to CI platforms of
the Hawkbit sample.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-10-23 11:42:39 +03:00
Abderrahmane JARMOUNI
6a1945be56 tests: boot: test_mcuboot: add stm32h750b_dk to CI platforms
Add stm32h750b_dk/stm32h750xx/ext_flash_app target to CI platforms.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-10-23 11:42:39 +03:00
Abderrahmane JARMOUNI
2fe301d98f samples: sysbuild: with_mcuboot: add stm32h750b_dk to CI platforms
Add stm32h750b_dk/stm32h750xx/ext_flash_app target to CI platforms

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-10-23 11:42:39 +03:00
Abderrahmane JARMOUNI
8beda69df8 boards: stm32h750b_dk: introduce board variant for apps in ext Flash
Introduce a board variant for storing an app in external QSPI NOR Flash
and chainloading it with MCUboot (placed in internal Flash) to be executed
in place (uses MCUboot's swap-using-offset mode, set via Sysbuild).

The new variant requires on MCUboot app side: a board/SoC DT overlay to
set the internal Flash & Flash controller as the chosen 'zephyr,flash' &
'zephyr,flash-controller', and CONFIG_STM32_MEMMAP=y (this was upstreamed
to MCUboot.)

Change external Flash memory attribute "zephyr,memory-attr" to
DT_MEM_ARM_MPU_FLASH, since ATTR_MPU_IO (corresponds to
"DEVICE_NON_SHAREABLE & P_RW_U_NA") is actually for memory-mapped devices
(with registers...) and was causing access issues with apps like LVGL that
would freeze the target. Also, change the size of the external flash
"zephyr,memory-region" node, since we only need to define accesss rights
to the memory space actually used by the external flash chips, not the
total addresssable QSPI memory.

The 2nd QSPI NOR contoller node was removed, since it does not reflect the
actual hardware layout, that has only one controller and the 2 NOR flash
chips are connected to it in parallel with a shift register.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-10-23 11:42:39 +03:00
Valerio Setti
fc422beb68 lib: uuid: replace legacy crypto support with PSA API
Legacy crypto support is going to be removed in the next Mbed TLS release
(which will be named TF-PSA-Crypto for the crypto support) so this
commit transitions UUID library from legacy crypto to PSA API.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-10-23 11:42:11 +03:00
Khoa Nguyen
4147a8ff9a samples: modules: lgvl: Update code mram for Renesas ek_ra8p1
Since the sample build is oversized for the RA8P1 CM85,
I’ve realigned the code MRAM size for both cores (CM85 and CM33)
to allow the CM85 build to run the sample successfully

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
75d766f713 tests: subsys: fs: Add tests support for Renesas ek_ra8m2 board
Add tests support for Renesas ek_ra8m2 boards:
- tests/subsys/fs/ext2
- tests/subsys/fs/fat_fs_api

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
eeef30fcc6 tests: driver: disk: Add tests support for Renesas ek_ra8m2 board
Add tests support for Renesas ek_ra8m2 boards:
- tests/drivers/disk/disk_access
- tests/drivers/disk/disk_performance

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
560d81db06 tests: subsys: sd: Add tests support for Renesas ek_ra8m2 board
Add tests support for Renesas ek_ra8m2 boards:
- tests/subsys/sd/sdmmc

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
07e9573d7f tests: subsys: pm: Add support for power_mgmt_soc on ek_ra8m2
Add support for test app `power_mgmt_soc` on Renesas ek_ra8m2

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
ea62a20cde tests: drivers: sdhc: Add tests support for Renesas ek_ra8m2 board
Add tests support for Renesas ek_ra8m2 boards

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
fc05a95f5a tests: drivers: dma: Add test support dma driver on ek_ra8m2
This commit adds testing support for dma driver on ek_ra8m2:
- tests/drivers/dma/chan_blen_transfer
- tests/drivers/dma/loop_transfer

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
93c9677d05 tests: drivers: i2s: Add tests support on Renesas ek_ra8m2
Add support for i2s test app on Renesas RA ek_ra8m2:
- tests/drivers/i2s/i2s_api
- tests/drivers/i2s/i2s_speed

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
35ea44d1c9 tests: drivers: counter: Add support test on Renesas ek_ra8m2
Add support for test app on Renesas ek_ra8m2:
- tests/drivers/counter/counter_basic_api

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
9070473e5e tests: drivers: uart: Add support for uart_async_api on ek_ra8m2
Add support for test app `uart_async_api` on Renesas ek_ra8m2

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
a64b626a8b tests: drivers: spi: Add support for spi_loopback on ek_ra8m2
Add support for test app `spi_loopback` on Renesas ek_ra8m2

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
e6754ea500 tests: drivers: pwm: Add support for pwm tests on ek_ra8m2
Add support for test apps on Renesas ek_ra8m2:
- tests/drivers/pwm_api
- tests/drivers/pwm_loopback

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
b9c8ce2935 tests: drivers: comparator: Add support gpio_loopback on ek_ra8m2
Add support for test app `gpio_loopback` on Renesas ek_ra8m2

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
63ac2e0ddb tests: drivers: i2c: Add support for i2c_api on ek_ra8m2
Add support for test app `i2c_api` on Renesas ek_ra8m2

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
e4cb0f4e8e samples: boards: renesas: Add support for comparator on ek_ra8m2
Add support for sample app `renesas/comparator` on ek_ra8m2

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
f8454a3525 samples: subsys: fs: Add tests support for Renesas ek_ra8m2 board
Add tests support for Renesas ek_ra8m2 boards:
- samples/subsys/fs

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
5e46dce290 samples: drivers: i2s: Add tests support for i2s ssie on ek_ra8m2
Add support for i2s samples app on Renesas RA ek_ra8m2:
- samples/drivers/i2s/output

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
1868eaf17c samples: drivers: counter: Add support for alarm on ek_ra8m2
Add support for sample app `alarm` on Renesas ek_ra8m2

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
9aa19fc16a boards: renesas: Add support Renesas ek_ra8m2 board
Add support Renesas ek_ra8m2 board

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Tran
c41b08caa4 dts: arm: renesas: ra: Add support Renesas r7ka8m2jflcac SoC
Add support Renesas r7ka8m2jflcac SoC

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Khoa Nguyen
51ffd9052e soc: renesas: ra: Add support Renesas ra8m2 SoC
Add support Renesas ra8m2 SoC

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 11:41:48 +03:00
Aleksandr Khromykh
7546d5e534 tests: bluetooth: mesh: remove its emulation leftovers
Commit removes missed its emulation leftovers.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2025-10-23 11:41:35 +03:00
Vinayak Kariappa Chettimada
625f3052f5 Bluetooth: Controller: nRF54L: Fix PPIB interface include cond compile
Fix trivial PPIB interface include conditional compile.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-10-23 11:41:25 +03:00
Andre Heinemans
929e55106a tests: flash: add interface tests
Tests for validating the robustness of the interface between the controller
and the flash chip using pattern-based testing.

Signed-off-by: Andre Heinemans <andre.heinemans@nxp.com>
2025-10-23 10:40:06 +02:00
Tony Han
faec659d45 board: microchip: sam: sama7g54_ek enable NET_L2_ETHERNET
Enable NET_L2_ETHERNET in Kconfig.defconfig.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
edc150e88f boards: microchip: sam: add nodes for GMAC1 to sama7g54_ek dts file
Add gmac1 and gmac1_mdio nodes.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
ac1c5bb1af drivers: ethernet: sam_gmac: update for support sama7g54
Use proper settings of clock, data bus width for sama7g54.
Update queue number checking and the macro definition in header file.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
0c1f48ebc2 drivers: ethernet: sam_gmac: add GMAC Reference Clock support
Add property for selecting the source for GMAC Reference Clock to dts
bindings yaml file.
Choose the source for the GMAC Reference Clock by GMAC_UR register.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
6a9a01a7d3 drivers: mdio: sam: update clocks for supporting sama7g54
Do not config the clocks as they are already done in soc.c.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
415450cbd8 soc: microchip: sam: configure the clocks for sama7g5 GMAC1
Configure ETH PLL to 625MHz.
Configure the generic clocks to 125MHz for GMAC1.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
ce23ab6d11 soc: microchip: sam: update MMU for sama7g5 GMAC1
Enable strong ordered access to the GMAC1 registers.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
0d50447c7d dts: microchip: sam: add nodes for GMAC1 to sama7g5.dtsi
Add gmac1 and gmac1_mdio nodes.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
b33f7bd06b drivers: ethernet: sam_gmac: use sys_cache_data_foo() for coherence
Replace cache coherence functions:
 - SCB_InvalidateDCache_by_Addr() to sys_cache_data_invd_range()
 - SCB_CleanDCache_by_Addr() to sys_cache_data_flush_range()

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Antonino Scarpaci
54ca22a626 drivers: video: Himax HM01B0 camera sensor driver
Add Himax HM01B0 camera sensor driver.
It depends on I2C and it is required to configure the camera.

Signed-off-by: Antonino Scarpaci <antonino.scarpaci@gmail.com>
2025-10-23 10:39:41 +02:00
Siratul Islam
d75f2edfd0 tests: drivers: auxdisplay: Add TM1637 build test
Add build test coverage for the TM1637 auxdisplay driver.

Creates gpio_devices.overlay for GPIO-based auxdisplay devices
and adds corresponding test case to verify the driver builds
correctly on native_sim platforms.

Signed-off-by: Siratul Islam <sirat4757@gmail.com>
2025-10-23 10:39:18 +02:00
Siratul Islam
cc0178489b drivers: auxdisplay: Add TM1637 7-segment display driver
Add a new auxdisplay driver for TM1637 7-segment LED displays.

The driver supports:
- 4-digit 7-segment display output
- Decimal point positioning
- Brightness control (0-7 levels)
- Display on/off control
- All digits (0-9)
- Basic cursor positioning

The driver implements the standard AUXDISPLAY API

Signed-off-by: Siratul Islam <sirat4757@gmail.com>
2025-10-23 10:39:18 +02:00
Siratul Islam
3c95305276 dts: bindings: auxdisplay: Add TM1637 binding
Add device tree binding for TitanMicro TM1637 7-segment LED
display controller. The TM1637 uses a GPIO bit-banging protocol
with clock and data pins.

Properties:
- clk-gpios: Clock GPIO pin
- dio-gpios: Data I/O GPIO pin
- bit-delay-us: Bit delay for GPIO protocol timing

Signed-off-by: Siratul Islam <sirat4757@gmail.com>
2025-10-23 10:39:18 +02:00
Jordan Yates
51b424e2f0 tests: modem: ppp: test custom ACCM's
Test the wrapping functions with custom asynchronous command character
maps.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-10-23 08:02:28 +02:00
Jordan Yates
4494b42372 modem: ppp: use peer control character map
Use the peers asychronous control character map to only escape
characters that need to be, instead of always escaping bytes 0 to 31.

For data packets with values randomly distributed, this results in 11%
fewer bytes needing to be transmitted over the link, if no bytes need to
be escaped (256+2)/(256+2+32).

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-10-23 08:02:28 +02:00
Jordan Yates
fbb84c7c0c net: l2: ppp: lcp: accept ASYNC_CTRL_CHAR_MAP option
Accept the `ASYNC_CTRL_CHAR_MAP` option in configuration messages from
the peer. The map is reset to the default value each time the interface
comes up.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-10-23 08:02:28 +02:00
Jordan Yates
13d35288bd net: l2: ppp: expose the peer ACCM
Expose the currently configured value for the PPP peers Asynchronous
Control Character Map through a public function.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-10-23 08:02:28 +02:00
The Nguyen
d64f570bd3 soc: ra4e2: fix IAR build failed
Correct the input section define for the device reset configuration
setting when enabling the CMake Linker Generator, which cause a build
failed when using the IAR build tool.

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-10-23 08:02:09 +02:00
Khoa Tran
a368dc9949 tests: drivers: pwm: Add pwm_test alias for Renesas devices
Add pwm_test alias to support test pwm_api on Renesas RA devices

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 08:01:21 +02:00
Khoa Tran
9548457715 drivers: i2s: Remove redundant condition check causing transfer error
When enabling the DTC (Data Transfer Controller) for the I2S SSIE driver
on Renesas RA8x2 boards, a redundant condition check prevented the
interrupt service routines from entering  during data transfer. This
caused the transfer to fail when DTC was active.

This commit removes the unnecessary condition check, allowing the DTC to
operate correctly with I2S SSIE transfers on RA8x2 devices.

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 08:01:21 +02:00
Khoa Tran
1ad2bc04b3 drivers: spi: Correct condition for continuing data transfer
When performing polling-based data transfer without enabling interrupts,
the current implementation stops transferring as soon as either the TX or
RX buffer becomes NULL. This causes the transfer to stop prematurely,
even if the other direction still has data to send or receive.

This commit fixes the condition so that data transfer continues
as long as one direction (TX or RX) still has data remaining.

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-10-23 08:01:21 +02:00