Commit graph

126,787 commits

Author SHA1 Message Date
Jiafei Pan
1c91532155 modules: hal_nxp: disable netc switch on imx95
i.MX 95 has no NETC switch, so disable it on this platform.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:20:48 +01:00
Jiafei Pan
c006dbea8e drivers: ethernet: netc_psi: add MMIPO mapping support
In order to support MMU mapping on Cortex-A core, added MMIO mapping
support in imx_netc_psi driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:20:48 +01:00
Jiafei Pan
e98a2c3d70 drivers: mdio: imx_netc: add mmio mapping support
Added MMIO memory mapping for NETC MDIO driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:20:48 +01:00
Jiafei Pan
4caf2efec9 drivers: ethernet: imx_netc: add netc block driver
Add NETC block driver, it could do some block memory region MMIO mapping
and also so dome block initialization, moved some netc related
configuration form board_init() to block driver so that it could be reused
between different platforms, although some configuration is different for
different platform, but put all NETC related code in the same driver to
make it easier to be maintained.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:20:48 +01:00
Jiafei Pan
30b6adf42d drivers: ethernet: imx_netc: add GIC MSI support
It could use GIC ITS as MSI controller on Cortex-A Core, so added
GIC ITS MSI support for NETC drivers.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:20:48 +01:00
Yusuke Omae
bd432c2727 net: gptp: add missing stepsRemoved assignment
The stepsRemoved of masterPriorityVector was
left unassigned when the best_port is not itself.

Signed-off-by: Yusuke Omae <s1413091@gmail.com>
2025-07-29 11:20:32 +01:00
Charles Dias
d37ec5136b samples: video: capture: add a stm32h7b3i_dk config
Add a configuration files for the stm32h7b3i_dk board.

Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
2025-07-29 11:19:33 +01:00
The Nguyen
7720a6a47f boards: renesas: ek_ra2a1: add support for ctsu on Renesas RA
Enable support for CTSU button on ek_ra2a1 board

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-07-29 11:19:20 +01:00
The Nguyen
de1207bac3 dts: arm: renesas: add CTSU device node for Renesas RA
Add device node support for Renesas RA SoCs

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-07-29 11:19:20 +01:00
The Nguyen
c538a18782 bindings: pinctrl: add ctsu psel selection for Renesas RA
Add CTSU pin function selection for Renesas RA devices

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-07-29 11:19:20 +01:00
The Nguyen
9ae5b7efd9 drivers: input: initial support for renesas,ra-ctsu
First commit to add support for Renesas RA Capasitive Sensing Unit

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-07-29 11:19:20 +01:00
The Nguyen
a5176adc41 manifest: update hal_renesas revision to latest
Update rev of hal_renesas to add support for CTSU

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-07-29 11:19:20 +01:00
Jiafei Pan
8bdd114ad1 tests: arm64_gicv3_its: add imx95_evk support
Add imx95_evk support, as hardware limication, it only has 832 LPIs.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Jiafei Pan
4dcd2ae5a4 boards: imx95_evk: refine GIC and SCMI objects init priority
GIC ITS depends on kernel heap, so move GIC initialize to be behind of
heap which initialization priority is CONFIG_KERNEL_INIT_PRIORITY_OBJECTS
(it is 30 by default).

MU mailbox and SCMI objects depend on GIC, so set their init priority
to be same with GIC, the initialization sequence decided by the dts
dependency although they use the same init priority.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Jiafei Pan
2d62d3f605 soc: imx95: a55: enable GIC redistribute and its noncoherent
GIC redistribute and ITS on i.MX 95 is DMA noncoherent, so enable
CONFIG_GIC_V3_RDIST_DMA_NONCOHERENT and CONFIG_GIC_V3_GIC_DMA_NONCOHERENT.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Jiafei Pan
353a96b623 soc: imx95: a55: include LPI in irq number
In case of ITS is enabled, need to include LPI in the total number
of irq.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Jiafei Pan
602c6292c3 dts: arm64: imx95_a55: add gic v3 its dts node
Added dts node for GIC v3 ITS.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Jiafei Pan
3290777d40 boards: imx95_evk: a55: enlarge memory size
Enlarge the memory size to 10M bytes as it is not enough if run some
networking application.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Jiafei Pan
b210fa0237 drivers: intc_gicv3_its: fix sleep issue in pre-kernel
GIC v3 ITS is initialized in pre-kernel stage in which sleep function
can't work yet, so use busy delay in pre-kernel stage and use sleep
delay in post-kernel stage.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Jiafei Pan
970e0181f1 drivers: intc_gicv3_its: fix incorrect RDbase when PE number is used
For RDbase used by its command, When GITS_TYPER.PTA = 1, physicall address
is used, the RDbase field consist of bits[51:16] of the address, so need
to left shift the address by 16 bits. But when GITS_TYPER.PTA = 0, PE
number is used, no need to shit anymore.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Jiafei Pan
9bb6a82a86 drivers: gicv3_its: enable dma noncoherent support
Add DMA noncoherent support on GICv3 ITS driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Jiafei Pan
83c88cee19 drivers: intc_gicv3: enable dma-noncoherent support
GIC redistributor on Some platform are connected to a non-coherent
downstream interconnect, it need to use Non-cahable and Non-shareable
access atttributes to access external memory. And also flush the
data cache after CPU update related memory.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-07-29 11:18:50 +01:00
Robert Lubos
279de669b5 net: lwm2m: Stop the LwM2M engine in case of fatal network error
In case of fatal network error (i.e. when the LwM2M client runs out of
retries), call lwm2m_engine_stop() to cleanup any allocated resources
for the client. The engine is dead at that point anyway so the
application needs to recover.

If this isn't done, it is theoretically possible to restart the LwM2M
client (with lwm2m_rd_client_start() which does not report an error in
such case), which in turn could lead to resource leaks (like for
example the observer list is reinitialized) if the application
didn't call lwm2m_rd_client_stop() first. Calling lwm2m_engine_stop()
ensures that all resources are freed even if the application doesn't
call stop before restarting.

Stopping the engine is also needed when the network error occurs when
de-registering - in such case the engine goes straight into the IDLE
state, where it's possible to restart the client and thus reinitialize
the observer lists.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-07-29 11:18:36 +01:00
Dmitrii Sharshakov
5c1d4db845 drivers: udc_rpi_pico: move control endpoint enable/disable
Move control endpoint enable/disable calls to udc_enable()/udc_disable().
It does not change much during USB device support initialization, but
it seems to resolve an issue when starting from RAM, though the real
cause is unknown.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-07-29 11:18:28 +01:00
James Roy
2ebf82ca5f subsystem: usb: device_next: Fix unchecked return value in usbd_cdc_ecm
Fix unchecked return value scanned by Coverity.

Signed-off-by: James Roy <rruuaanng@outlook.com>
2025-07-29 11:18:20 +01:00
Tahsin Mutlugun
00e217da7d boards: adi: max32657evkit: Add adxl367 accelerometer
Add support for ADXL367 accelerometer connected to I3C bus.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-07-28 21:06:00 -04:00
Tahsin Mutlugun
6320e504dd boards: adi: max32657evkit: Enable I3C peripheral
Add I3C node to MAX32657EVKIT board devicetree and add I3C to the list
of supported drivers.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-07-28 21:06:00 -04:00
Tahsin Mutlugun
3885278b96 drivers: i3c: shell: Add shell support to MAX32 I3C
Enables shell support for MAX32 I3C driver.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-07-28 21:06:00 -04:00
Tahsin Mutlugun
ac1152b0b6 dts: arm: adi: max32657: Add I3C instance
Add I3C instance to max32657.dtsi.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-07-28 21:06:00 -04:00
Tahsin Mutlugun
d1d983dfdb drivers: i3c: Introduce MAX32 I3C driver
Add I3C driver for ADI MAX32 microcontrollers.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-07-28 21:06:00 -04:00
Daniel Leung
4b15936329 tests: kernel/smp_boot_delay: workaround occassionally failures
test_smp_boot_delay sometimes fails due to thread started by IPI
not having started or not finished running:

* Using CPU mask to explicitly state which CPU to start the thread
  seems to fix the issue where the thread is not started quickly
  enough.
* When the host  system is under heavy load (e.g. twister-ing),
  emulators may not get enough CPU time to run the newly created
  thread. So extend the IPI delay a bit more to allow for this.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-07-28 21:03:43 -04:00
Phi Bang Nguyen
1edc97cd04 doc: migration guide: display: Mention rgb565/bgr565 fix
Mention that the RGB565 and BGR565 interchange issue has been fixed
in the display sample.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-07-28 16:45:33 -04:00
Phi Bang Nguyen
9e7596dce8 boards: shields: rk0xxx: Set default format to RGB565
The default supported format in these LCD is RGB565, not BGR565. It is
set to BGR565 because a wrong assumption about "byte swap" in Zephyr.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-07-28 16:45:33 -04:00
Phi Bang Nguyen
d69bea3c5e drivers: display: dcnano_elcdif: Fix RGB565/BGR565 format mismatch
Format is incorrectly forced from RGB565 to BGR565. Fix it.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-07-28 16:45:33 -04:00
Phi Bang Nguyen
d9513095d9 drivers: display: elcdif: Fix RGB565/BGR565 format mismatch
Format is incorrectly forced from RGB565 to BGR565. Fix it.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-07-28 16:45:33 -04:00
Phi Bang Nguyen
d0f7604b1a samples: drivers: display: Fix RGB565/BGR565 interchange issue
The RGB565 and BGR565 formats are interchanged in the sample. This leads
to wrong assumptions about "byte swap" in Zephyr and make display
drivers, shields and video sample follow it for a long time. Fix it.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-07-28 16:45:33 -04:00
Phi Bang Nguyen
2fdc051269 samples: drivers: video: Fix RGB565/BGR565 in display format
Formats should be coherently set between camera and display. Forcing
RGB565 to BGR565 will break some platforms.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-07-28 16:45:33 -04:00
Emil Gydesen
220571efcb Bluetooth: CCP: Check conn type before access by index
Ensure that the connection type of the provided bt_conn is
an LE connection.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-07-28 16:45:17 -04:00
Emil Gydesen
0347d92072 Bluetooth: BAP: SD: Add missing error checks for mutex locks
Add missing error checks for mutex locks after the mutexes
were changed to not use K_FOREVER which should not be done in
the BT RX thread.

A larger overhaul of how mutexes are using within the scan delegator
should be considered, as there are a lot of locks and unlocks when
handling the callbacks.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-07-28 16:44:58 -04:00
Jordan Yates
bd774ff98b tests: disk: disk_access: test STM32L4 DMA
Ensure that the shared DMA variant of the STM SDMMC driver is compiled
in CI.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-07-28 16:44:33 -04:00
Jordan Yates
3698507585 disk: sdmmc: support L4 series with shared DMA channel
Update the driver to support DMA operations on L4 series devices, with
a shared DMA channel. Split channels do not work on these chips, since
there is no dedicated TX and RX channels on the DMA, so configuring two
channels with SDMMC as the peripheral results in a non-functional
configuration.

Fixes #91216.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-07-28 16:44:33 -04:00
Armando Visconti
792b7e3570 rtio: add helper function rtio_read_transaction()
Add a helper function that constructs a rtio SQE chain with the purpose
to perform a bus read operation on a list of registers.

Usage:

  struct rtio_regs regs;
  struct rtio_reg_list regs_list[] = {{regs_addr1, mem_addr_1, mem_len_1},
                                      {regs_addr2, mem_addr_2, mem_len_2},
                                      ...
                                     };
  regs.rtio_regs_list = regs_list;
  regs.rtio_regs_num = ARRAY_SIZE(regs_list);

  rtio_read_regs_async(rtio,
                       iodev,
                       RTIO_BUS_SPI,
                       &regs,
                       sqe,
                       dev,
                       op_cb);

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2025-07-28 16:44:17 -04:00
Van Petrosyan
37d8ec295b drivers: led: Added PCA9533 to build_all overlay
PCA9533 is added to the overlay so the new driver
is compiled by the automated “build all LED drivers” test

Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
2025-07-28 16:43:48 -04:00
Van Petrosyan
7c845f14d4 drivers: led: Implemented PCA9533 driver with PM support
• Supports led_on/off, led_set_brightness (0–100 %, 152 Hz default),
  and led_blink (7 ms – 1.685 s) with automatic sharing of the two
  on-chip PWM engines; returns –EBUSY when a third distinct pair is
  requested.

• Includes basic runtime-PM boilerplate to honour power-domain control;
  the device itself has no dedicated low-power states.

Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
2025-07-28 16:43:48 -04:00
Van Petrosyan
aaada72b00 drivers: led: Added dt-binding for pca9533 led dimmer
Added DT binding for the PCA9533 LED Dimmer

Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
2025-07-28 16:43:48 -04:00
Cheng Chang
afcce53220 bluetooth: host: a2dp:error_code should be detailed in set_config_rsp
Error codes fall into two main categories:
case 1: NOT_SUPPORT_XXX. This means that the configuration of the
parameter is not supported locally.
case 2: INVALID_XXX. This means that the parameter is not configured or
duplicated in the set_config_req command.

Currently the protocol only supports SBC, so it is only checked for SBC
parameters.

Signed-off-by: Cheng Chang <cheng.chang@nxp.com>
2025-07-28 16:43:29 -04:00
Holt Sun
4618e86edd drivers: irtc: Updated rtc driver to support NXP RT700 device.
1. Update nxp irtc driver to fix issue in init and alarm function.
2. Update RTC device tree binding to support "share-counter".
3. Update RT700 dtsi to support rtc0 for cpu0 and rtc1 for cpu1.
4. Update readme.
5. Update unit test project conf for RT700.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-07-28 16:42:30 -04:00
Declan Snyder
fe8da67342 tests: spi_loopback: Specify expected CS on helper func
The helper function should have the flexibility to have different
expected CS counts. Namely, the test cases where the transfer is
essentially empty should not need to assert CS and many platforms are
failing on CS testing currently due to expecting CS assert and deassert
despite it being a 0 clock/bit transfer being specified.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-07-28 16:42:08 -04:00
Declan Snyder
285245c69a tests: spi_loopback: Use atmoic_t instead of sem for CS
Use an atomic_t instead of semaphore for counting the CS, semaphore is
too heavy and wrong choice for this variable.

Also, print what the actual value gotten was in case of error.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-07-28 16:42:08 -04:00
Vinit Mehta
1d44972a26 samples: bluetooth: pbp_public_broadcast: Fix PACS register issue
- Add sink PACS register for PBP public broadcast sink example to make
  it work with PBP broadcast source

Signed-off-by: Vinit Mehta <vinit.mehta@nxp.com>
2025-07-28 16:41:51 -04:00