For IRQs, shadow stack support a mechanism similar to the Interrupt
Stack Table (IST) for x86_64: a table, indexed by the IST index, pointing
to a 64 byte table in memory containing the address of seven shadow stacks
to be used by the interrupt service routines.
This patch adds support to this mechanism. It is worth noting that, as
Zephyr may exit from an interrupt by going to a different thread than
the one that was interrupted, some housekeeping is done to ensure that
the necessary shadow stack tokens are on the right shadow stack before
return from the interrupt.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Shadow Stack is one of the capabilities provided by Intel Control-flow
Enforcement Technology (CET), aimed at defending against Return Oriented
Programming.
This patch enables it for x86_64 (32-bit support coming in future
patches):
- Add relevant Kconfigs;
- Shadow stacks should live in specially defined memory pages, so
gen_mmu.py was updated to allow that;
- A new macro, Z_X86_SHADOW_STACK_DEFINE, added to define the area
for a shadow stack;
- A new function, z_x86_thread_attach_shadow_stack(), added to
attach a shadow stack to a never started thread;
- locore.S changed to enable/disable shadow stack when a thread
using it comes in/out of execution.
As not all threads are currently shadow stack capable, threads that do
not use it will still run with shadow stack disabled. Ideally, at some
point in the future, all threads would use the shadow stack, so no need
to disable it at all.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Add code to enable it and sprinkle `endbr64` on asm code, where needed.
Namely, IRQs and excepts entrypoints.
Finally, tests added to ensure IBT behaves sanely.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Indirect Branch Tracking (IBT) is one of the capabilities provided by
Intel Control-flow Enforcement Technology (CET), aimed at defending
against Jump/Call Oriented Programming.
This patch enables it for x86 (32-bit, 64-bit support coming in future
patches):
- Add relevant Kconfigs (everything is behind X86_CET);
- Code to enable it;
- Enable compiler flags to enable it;
- Add `endbr32` instructions to asm code, where needed.
Points in the code where an indirect branch is expected to land need
special instructions that tell the CPU they are valid indirect branch
targets. Those are added by the compiler, so toolchain support is
necessary. Note that any code added to the final ELF also need those
markers, such as libc or libgcc.
Finally, tests added to ensure IBT behaves sanely.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
This adds exception handling of control protection exception
in fatal code.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Commit f9168ae464 made all non-cached memory
loadable by default.
However as nocache memory is typically used for reserving larger buffers to
be shared between peripherals, this comes at fairly large cost towards ROM
usage.
This commit creates two distinct sections for both loadable and
non-loadable nocache memory sections.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The current initialization sequence enables the I3C controller before
setting the controller information, which can result in improper setup
and cause the controller to not function as expected.
Fix the initialization order by ensuring that the controller information
is set prior to enabling the controller.
Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Signed-off-by: Balanakakamal V <balanakakamal.v@amd.com>
Commit df0f74d491c851b3e7e970f898c5c2fc3aab5b80 added a shell command to be
able to print out the partitions. However the label property is optional.
Print both the name and label if available.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This refines log message in udc_common.c, including:
1. Add address of allocated net_buf info into udc_ep_buf_alloc log so
that net_buf create/destroy can be easily monitored with calls to
udc_ep_buf_alloc and udc_buf_destroy.
2. Add ep info into udc_ep_buf_alloc log on failure.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Those memories should be disabled by default and enabled
at application level.
Incidentally, fix the way Kconfig symbol is enabled as
we should not parse status of ramcfg, but status of enabled
memory nodes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The uart_sam0_irg_rx_ready() function always returns true, even if
interrupt is disabled. This happens because the function do not
evaluate if the interrupt is enable of not. This fixes the issue
by adding the missing check.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The gpio_int_trig enum did not enumerate all possible combinations
of flags after the addition of the GPIO_INT_WAKEUP flag.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
The GPIO_INT_WAKEUP flag is available in the binding header,
but was not propagated from dt_flags in the interrupt_configure_dt
function. Allow GPIOs to be declared as wakeup sources in dts
by propagating the flag.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Since 45a3d31, the GPIO_INT_WAKEUP flag has been available in
the binding header. Update the mask to include it.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Instead of add BT_UUID_BROADCAST_AUDIO_VAL for either BAP or
CAP, we now only do it one place (in BAP). This can now be done
since the default_source.broadcast_id was recently added.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Add a broadcast_id field in broadcast_source so that it can be
lookup later, which is useful for doing broadcast assitant
procedures on a local broadcast source.
The broadcast ID is now created at the same time as the
broadcast source(s), instead at the time of retriving
the advertising data.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Follow ROMABLE_REGION from include/.../arm/cortex_m/scripts/linker.ld
This enables UF2 images to be created for RAM-only apps on RP2350.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
This commit updates the hal_silabs revision in west.yml
Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Implemented siwx91x_set_rts_threshold and siwx91x_get_rts_threshold
Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Apply the same modifications made to the ZynqMP's memory
regions to the cortex_r8_virtual SoC which was mainlined
while the fixes for the ZynqMP were being developed
(minus the OCM mapping, as there's no indication that this
type of memory was considered).
The cortex_r8_virtual appears to be a stripped down copy
of the old qemu_cortex_r5 codebase, therefore, the duplicated
MPU regions have the same flaws as qemu_cortex_r5 or any
actual ZynqMP-based target for that matter.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Overhaul the MPU region definitions that are being
configured when the MPU is set up:
- drop local attribute definitions in favor of those
already provided in arm_mpu_v7m.h
- actually tie the RAM region to the device tree
- set up a (potentially overlapping) R/O region for
.text and .rodata, which hasn't existed so far
- Consider XIP
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Remove the universal, unconditional declaration of the RAM area
at the SoC level, due to:
- the hardcoded base address 0 overlapping the exception vectors,
the ATCM and the BTCM areas.
- the availability of the BTCM not being guaranteed unconditionally
(config pin dependant)
- the possibility of having a 'black hole' between the ATCM and
the BTCM depending on the operating mode of the R-cores cluster,
which leads to a part of the text section being unavailable
- qemu not properly implementing the configuration-dependant
behaviour of the ATCM and BTCM areas.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Declare the sram0 area for this board to start at 0x4000000
and to be 64MB in size. The base address is the lowest possible
multiple of 64MB which doesn't have its base address at 0,
therefore preventing the mixed use of regular RAM and the
ATCM/BTCM and the possible issues of having a 'black hole'
between the ATCM and BTCM areas or the BTCM being completely
disabled.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Expand the RAM area beginning behind the BTCM to allow the use
of a 64MB SRAM area starting at 0x4000000, which is the lowest
possible 64MB area with a non-zero start address that doesn't
overlap with the ATCM and BTCM memory areas.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Move the unmodified sram0 memory area declaration to this board's
device tree due to its removal from the SoC device tree.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Move the unmodified sram0 memory area declaration to this board's
device tree due to its removal from the SoC device tree.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Upload Doxygen coverage report to codecov.io in cron-scheduled doc build
Fixeszephyrproject-rtos/zephyr#94708
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Provide toolchain-specific implementations for the new functions
added in d77b58a, because the default ones end up with build failures.
As the MWDT toolchain doesn't support different combinations of
compilers and linkers, there's no need to pass any linker properties
from the compiler, at least for the time being. Moreover, the default
implementation of compiler_set_linker_properties() uses the compiler
flag (--print-libgcc-file-name) that doesn't make any sense for MWDT.
Therefore, provide an empty implementation of the function.
The default implementation of toolchain_linker_add_compiler_options()
doesn't cause any issues for now, but it's still better to replace
it with the passthrough implementation borrowed from ld/lld.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
Check that the buffer length of the received advertising data is less
than reported TotalLength in Transaction Start PDU.
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
Because the EC host command with SHI/SPI backend is timing sensitive, it
required the CPU to response the SHI interrrupt as soon as possible.
This commit re-arranges the default interrupt priority by:
1. keep the SHI's interrupt priority to 1.
2. Decrease the priority of the other peripherals by 1.
(i.e. increase the priority `value` by 1)
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Move Kconfig symbol setting to 'Kconfig.defconfig' file to fix
compliance check "defined without a type" warning.
Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
Change BoardYml compliance check from using get_module_setting_root()
to load and parse module.yml directly.
get_module_setting_root cannot be used directly with module.yml.
Instead adjust the code so that the module.yml file is loaded locally
and the dts_root setting is extracted from the dictionary.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Adds support for outputting details on sysbuild Kconfigs for use
with the documentation Kconfig lookup tool
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
When compiling, the following warning occurs:
Warning (simple_bus_reg): /soc/sai1@452005804: simple-bus unit address
format error, expected "52005804"
Looking at table 3 in the reference manual[1] for the stm32n6 it seems that
the sai1_a address simply had a typo, where a "4" was added in front of the
correct address.
Fix the typo.
[1] RM0486 Rev 2: https://www.st.com/resource/en/reference_manual/rm0486-stm32n647657xx-armbased-32bit-mcus-stmicroelectronics.pdf
Signed-off-by: Emil Dahl Juhl <emil@s16s.ai>
