Implement `arch_curr_thread()` & `arch_set_curr_thread()`
with the global pointer (GP) register.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Add the following arch-specific APIs:
- arch_curr_thread()
- arch_set_curr_thread()
which allow SMP architectures to implement a faster "get current
thread pointer" than the default provided by the kernel. The 'set'
function is required for the 'get' to work, more on that later.
When `CONFIG_ARCH_HAS_CUSTOM_CURRENT_IMPL` is selected, calls to
`_current` & `k_sched_current_thread_query()` will be redirected to
`arch_curr_thread()`, which ideally should translate into a single
instruction read, avoiding the current
"lock > read CPU > read current thread > unlock" path in SMP
architectures and thus greatly improves the read performance.
However, since the kernel relies on a copy of the "current thread"s on
every CPU for certain operations (i.e. to compare the priority of the
currently scheduled thread on another CPU to determine if IPI should be
sent), we can't eliminate the copy of "current thread" (`current`) from
the `struct _cpu` and therefore the kernel now has to invoke
`arch_set_curr_thread()` in addition to what it has been doing. This
means that it will take slightly longer (most likely one instruction
write) to change the current thread pointer on the current
CPU.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The clock_t and clockid_t types are already defined in ARC MWDT headers,
so they should not be defined again in Zephyr headers.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
The clockid_t definition in question is not reachable anymore
because at least one of _CLOCKID_T_DECLARED and __clockid_t_defined
macros is already defined by that point, always making the check fail.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
Until POSIX layer decoupling is done, we still need the size_t type
definition across the codebase, but it should come through sys/types.h
and not through toolchain-specific headers.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
As the test uses reentrant time functions like asctime_r or ctime_r,
it should select POSIX_C_LANG_SUPPORT_R. Otherwise there are build
failures observed with the default test configuration if these
functions are not provided by the toolchain.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
This change is needed to avoid including Zephyr-specific implementations
of POSIX reentrant functions while building natively. One can safely
assume that the host libc indeed provides its own implementations of
the said functions.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
ARC MWDT library does not contain implementations for the reentrant
POSIX time functions, so common Zephyr implementations end up being
used instead. However, there are no declarations, so we just add them
here, unguarded, until a better place is found.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
The fileno macro defined in ARC MWDT headers conflicts with the fileno()
function defined in lib/posix/options/device_io.c. We should undefine it
and replace with a POSIX-compliant declaration and a weak definition.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
mipi api allows only buffers where pitch is equal to width.
buffers with smaller width get split into multiple transmissions
but mipi buffer size was set incorrectly.
Signed-off-by: Manuel Martin <martiman89+github@gmail.com>
Document change to mipi-dbi device binding, and provide users with
example of how to transition to the new mipi-mode property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use a string for the mipi-mode property over an integer value, as this
significantly improves the readability of the MIPI DBI device binding.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The python subprocess call had a stdout=subprocess.PIPE parameter that
redirects standard output to a pipe, and a stderr=subprocess.STDOUT
parameter that redirected stderr to the pipe. This mixed JSON and
non-JSON output together, and issued an exception. Fixing with
stderr=subprocess.DEVNULL to ignore standard error and only keep the
JSON output.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Reset pulse count can be up to 512 before we would be unable to support
it using the peripheral. Use a uint32_t for the count, so that even long
reset pulses will still be calculated correctly. Add code to warn about
reset pulse requests that are too long.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The NXP LCDIC peripheral contains two internal timers, with configurable
periods. These times are used to determine delays within the peripheral,
such as the reset and tearing enable signal delays. Allow these periods
to be set within the devicetree for the peripheral.
Raise the period where required for display drivers that need a value
other than the reset setting
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Extend tca954x (tca9546a, tca9548a) driver to support tca9544a i2c MUX.
(different bitmask and flag for enable bit in register)
Signed-off-by: Florian Weber <Florian.Weber@live.de>
Add isr_ok property to the interrupt configure API.
For level-triggered interrupt the interrupt may have to be disabled
until a thread context can process it and clear the interrupt trigger.
The function is documented as returning an error if it would block.
Drivers in zephyr already do this, so if this is not ISR safe function
then they need to be fixed.
Signed-off-by: Joakim Andersson <joerchan@gmail.com>
- Add possibility to disable functions that use heap. This is to
reduce code size and prevent accidental use of heap.
- Add possibility to compile xxhash library, "Extremely Fast Hash
algorithm" in. It might be sometimes needed as a standalone,
but especially lz4frame requires it.
- Add possibility to compile also hc and lz4frame modules. The
config options include possibility to configure will heap or
stack be used. Defaults are set according to lz4's current
defaults.
Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
Add EAP-TLS, EAP-PEAP-MSCHAPv2, EAP-PEAP-GTC, EAP-TTLS-MSCHAPv2,
EAP-PEAP-TLS, EAP-TLS-SHA256 enterprise wpa2 and wpa3 suiteb
support for sap.
Signed-off-by: Rex Chen <rex.chen_1@nxp.com>
Add note about compatible change for NXP PORT IP. Also, update
references to the DT compatible within board docs.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
NXP PORT IP instantiations often have different features absent, IE
input buffer, open drain, or slew rate support. Check if the relevant
PCR register bitmasks are defined in the common pin control file, and
define the bitmasks to 0x0 (no effect) if they are not. This allows us
to further consolidate the pinctrl_soc.h headers for SOCs using the PORT
IP.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The NXP PORT pinmuxing peripheral is reused across the MCX, S32, and
Kinetis lines. Rename the compatible from the family-specific
nxp,kinetis-pinctrl to a more generic nxp,port-pinctrl to reflect the
actual name for the IP block used within reference manuals.
Update the NXP HAL revision to include a change to use the new Kconfig
name for the PORT pinctrl driver
Update the MAINTAINERS.yml path, as there are no longer any NXP drivers
matching the string "drivers/*/*kinetis*
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
* Replace copies of fixed-partitions nodes in related boards by
referencing the apropriate partition table from the available list.
* For better reference the `partitions_*.dtsi` file has boot offset,
purpose and the flash size encoded in the file name. Default flash size
is considered to be 4MB.
* Added the flash size node for the boards which are not based on the
module.
* Removed flash size registry from the esp32.*common.dtsi
Signed-off-by: Marek Matej <marek.matej@espressif.com>
