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105,063 commits

Author SHA1 Message Date
Laurentiu Mihalcea
8a1785b8aa soc: nxp: soc.yml: remove unsupported cpu clusters for imx8 socs
Some imx8 socs have cpu cluster entries for cores that
are not currently supported. Remove them.

Fixes #79027.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-10-07 18:43:26 +02:00
Hou Zhiqiang
fd103f2ccc soc: nxp: imx95: fix indent of MMU entry
Fix the indent of LPUARTs MMU setup entry.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2024-10-07 18:43:20 +02:00
Yangbo Lu
0d49482b9f west.yml: update hal_nxp to the latest
Updated hal_nxp to the latest.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2024-10-07 18:43:12 +02:00
Yangbo Lu
dc734e19f9 boards: nxp: imx95_evk: enable TPM2 PWM on M7
Enabled TPM2 for PWM on imx95_evk m7.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2024-10-07 18:43:12 +02:00
Yangbo Lu
621681fabe boards: nxp: imx95_evk: add TPM2 pinmux support in dtsi
Added TPM2 pinmux support in dtsi.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2024-10-07 18:43:12 +02:00
Yangbo Lu
6ac457fb8e dts: arm: nxp_imx95_m7: add all TPM nodes
Added all TPM nodes for nxp_imx95_m7.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2024-10-07 18:43:12 +02:00
Yangbo Lu
11ef521c60 drivers: pwm_mcux_tpm: adapt to more platforms
The TPM max channel number was got from register array size.
However some platforms TPM instance may begin from TPM1 rather
than TPM0. This should be handled in driver.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2024-10-07 18:43:12 +02:00
Paul He
c2911af78e fs: littlefs: get block_cycles value from dts
Property "block-cycles" is required for node "zephyr,fstab,littlefs",
but source code did not get the value from dts file, now add it.

Additionally correct the wrong description of property "block-cycles"
in binding file.

Signed-off-by: Paul He <pawpawhe@gmail.com>
2024-10-07 18:43:05 +02:00
Pisit Sawangvonganan
640a2ade8b drivers: serial: ra8_sci_b: adjust return usage in void functions
For code clarity, this commit adjusts the use of `return` statements
in functions with a void return type by:
- Remove unnecessary `return` statements when
  they don't affect control flow.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-10-07 18:42:58 +02:00
Pisit Sawangvonganan
626918588d drivers: serial: ra8_sci_b: revise switch-case in callback_adapter
Unified switch-case usage in `uart_ra_sci_b_callback_adapter` to use
`break` instead of `return`.
Typically, a `break` is used in switch-case statements unless an early
return is necessary, in which case `return` is appropriate.

For this case, using a `break` statement is the more suitable choice.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-10-07 18:42:58 +02:00
Gerard Marull-Paretas
d3ca4fd84f tests: lib: cpp: cxx: ignore nRF54H20 DK 0.8.0
nRF54H HAL is not compatible with C++98, add new board revisions to the
list so that they are skipped.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
df9a84ea31 boards: nrf54h20dk: add board revision 0.9.0
Add a new revision for nRF54H20 DK: 0.9.0. This new hardware spin contains
the final nRF54H20 SoC. Treat it as the default, including twister.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
47212de9de boards: nrf54h20dk: introduce revision 0.8.0 (current)
The current DK is labeled as revision 0.8.0. Until now, no revisions were
needed, but a new hardware spin is coming, so we'll need to keep at least
two revisions in the near future until the final one becomes the default.
Prepare the board for that scenario. Note that the "old" nRF54H20 SoC is
now nRF54H20 EngB.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
091e38b3f2 scripts: west_commands: runners: nrf: add support for nRF54H20 EngB
Make sure cpuapp/cpurad cores are detected correctly when using nRF54H20
EngB.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
5a4655f69f drivers: adc: nrfx_saadc: use CONFIG_NRF_PLATFORM_HALTIUM
So that any Haltium based SoC uses the same settings, including nRF54H20
EngB.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
72ab376c24 modules: hal_nordic: nrfs: add support for nRF54H20 EngB
Make nrfs compatible with the EngB soc revision.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
40f5ca03b5 modules: hal_nordic: add support for nRF54H20 EngB
Add support for nRF54H20 EngB in the Nordic HAL glue code.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
a9d0eacae2 soc: nordic: nrf54h20: add support for nRF54H20 EngB
nRF54H20 EngB is a re-label to the existing hardware revision for the
nRF54H20. nRF54H20 (whithout EngX) is becoming the final revision of the
SoC.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Adam Kondraciuk
bc7a5b6781 drivers: timer: nrf_grtc_timer: Align Zephyr to new AUTOEN read manner
The new GRTC reading manner of the SYSCOUNTER uses hardware mechanism which
allows to keep it alive when any of CPUs is not sleeping. Otherwise
the SYSCOUNTER goes into sleep mode. Thus there is no
longer need to maintain the `CONFIG_NRF_GRTC_SLEEP_ALLOWED` symbol, however
if the user wants to have the SYSCOUNTER enabled all the time the
`CONFIG_NRF_GRTC_ALWAYS_ON` can be used instead.
The nrfx_grtc  driver no longer provides the `wakeup-read-sleep` reading
manner.
Also setting the GRTC clock source is performed by the nrfx_grtc driver so
it has been removed from the `sys_clock_driver_init()` function.

Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
b2031aa20d bluetooth: controller: ll_sw: nordic: align to nrfx 3.7.0
Some enums have been renamed:

- NRF_CCM_EVENT_ENDCRYPT -> NRF_CCM_EVENT_END
- NRF_CCM_TASK_CRYPT -> NRF_CCM_TASK_START

Also adjust some TX power level settings (26/28dBm not always available
depending on the SoC revision).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
9d82a03444 modules: hal_nordic: add nrf54l system sources to bsim build
Include system_nrf54l.c file when building for bsim.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
97dff5bccb modules: hal_nordic: align PDM configuration
Introduce instance 0, PDM0, following nrfx 3.7.0 update.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Nikodem Kastelik
de82f2f4cb manifest: update hal_nordic revision to have nrfx 3.7.0
Bring latest release of nrfx: 3.7.0.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Gerard Marull-Paretas
c39ad845f3 scripts: ci: check_compliance: add BOARD_REVISION in Kconfig.board.v2
This is required if boards make use of such definition in their Kconfig
files. In Kconfig.board.v2, only `boards/Kconfig.v2` is loaded, but
BOARD_REVISION is part of `boards/Kconfig`, which can't be loaded in this
context.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-07 18:42:14 +02:00
Francois Gervais
736344b310 tests: coap_client: optimize/reduce sleep time
The goal of this commit is to reduce the overall test time by optimizing
the time spent sleeping.

However while doing so, a few glitches became apparent and those have
been fixed as well.

1. The way the ZSOCK_POLLIN event is managed has been modified

In most tests, the event would stick for the whole test and this would
sometimes results in the client receiving more data than intended which
in turn would results in various unexpected warnings and errors.

The management of the ZSOCK_POLLIN event has now been mostly moved to
the send/receive overrides which better represent how things would
happen outside of the test scenario.

For example, when sending data, if this send would normally result in
receiving some response, the send function sets the ZSOCK_POLLIN event.
Then when receiving, we clear the event as the data has been received.

There are a few exceptions to this for cases where we need to simulate
some specific abnormal behavior.

2. The `messages_needing_response` queue now includes a valid bit

The test manages a queue of messages id to be able to respond to the
correct id in the receive hooks.

It was built in a way that the id 0 would be treated as invalid
although it is a valid id.
In practice, it would not be an issue in most cases however, it would
result in an unexpected behavior if the `test_multiple_requests` test
would be run first.

To fix this issue in the simplest way, the queue has been changed to
uint32_t which gives us 16 extra bits for the management of the queue,
1 of which is used to tell if the entry is valid or not.

Signed-off-by: Francois Gervais <francoisgervais@gmail.com>
2024-10-07 17:13:47 +01:00
Maximilian Deubel
fd686a25b3 drivers: dp: swdp_bitbang: Update SWD clock calculation
This patch updates the SWD clock calculation to the latest behavior
of DAPLink.

Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
2024-10-07 17:13:37 +01:00
Maximilian Deubel
621a6000d5 drivers: dp: swdp_bitbang: hardcode nRF53 SYSCLK
Since CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC is tied to the slow RTC clock
for the nRF53, use the default SYSCLK of 64MHz instead.

Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
2024-10-07 17:13:37 +01:00
Andrej Butok
4511662fe5 boards: nxp: Add Serial Recovery button alias
Fixes MCUBoot Serial Recovery compilation error
"Serial recovery/USB DFU button must be declared
in device tree as 'mcuboot_button0'"

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2024-10-07 17:13:28 +01:00
Ioannis Damigos
1fdbd7e16a da1469x_dk_pro: Add user button
Add user button.

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2024-10-07 17:13:14 +01:00
Daniel Schultz
836370f67c MAINTAINERS: Add PHYTEC Platforms
PHYTEC currently supports five boards in Zephyr, with another in
development. Given the growing interest from our customers and our
commitment to expanding support for PHYTEC platforms, I am
volunteering to take over the maintenance of these boards.

This will help streamline contributions and reduce the workload on
the silicon vendor maintainers.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-10-07 17:13:08 +01:00
Benjamin Cabé
07d6632201 boards: Fix duplicate image in MAX32666FTHR board doc
Front picture was listed twice, despite the back picture
(max32666fthr_img2.jpg) actually being checked into the repo, so switch
to that one.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2024-10-07 17:12:52 +01:00
Abram Early
583f4956dc modbus: reset wait semaphore before tx
A response returned after a request times out would increment the
semaphore and stay until the next request is made which will immediately
return when k_sem_take is called even before a response is returned. This
will once again have the same problem when the actual response arrives.
So the wait semaphore just needs to be reset before transmitting.

Signed-off-by: Abram Early <abram.early@gmail.com>
2024-10-07 17:12:44 +01:00
Pisit Sawangvonganan
a378440116 drivers: intc: stm32: correct inconsistent parameter names
Correct several inconsistent parameter names in the following functions:
- stm32_gpio_intc_select_line_trigger: rename `trigger` to `trg`
  to match the header file.
- stm32_gpio_intc_set_irq_callback: rename the callback argument to `user`
  to match the `stm32_gpio_irq_cb_t` type.
- stm32_exti_get_line_src_port: rename `pin` to `line` to align with
  the Doxygen comment and implementation.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-10-07 17:12:34 +01:00
Chaitanya Tata
2dec9313e4 modules: hostap: Use net_mgmt context
Using a separate workqueue causes issues without any special locking to
synchronize with networking threads e.g., interface being removed while
the workqueue is trying to synchronize with WPA supplicant.

It's easier to use the net_mgmt thread which is in better sync with
networking.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2024-10-07 17:12:24 +01:00
Chaitanya Tata
56d7e9a487 modules: hostap: Fix typo in NM unregistration
The module name is not modified in remove.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2024-10-07 17:12:24 +01:00
Chaitanya Tata
c44aa6b18e modules: hostap: Fix double free in case of error conditions
In case of error conditions post successfully sending the message, the
event is already freed but we attempt to free it again.

Rejig the labels to easily reflect thier purpose.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2024-10-07 17:12:24 +01:00
Chaitanya Tata
2d7c995395 modules: hostap: Fix double free of the event
When an event is sent the receiver gets is asynchronously and hence is
responsible for free the event, the sender should only free in case of
error conditions i.e., unable to send.

Else, this causes a tough to debug double-free.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2024-10-07 17:12:24 +01:00
Chaitanya Tata
1da74ef705 net: wifi: Fix DPP disabled build
In case WPA supplicant disabled DPP, we need to compile out the
corresponding DPP code in Wi-Fi shell too.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2024-10-07 17:12:16 +01:00
TOKITA Hiroshi
86da989a52 tests: drivers: build_all: display: Add config for solomon,ssd1327fb
Add configuration for "solomon,ssd1327fb" to enable build test.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-10-07 17:11:58 +01:00
TOKITA Hiroshi
8529e93501 tests: drivers: build_all: display: Add mipi-dsi devices to build test
Add build tests for the following devices.

- himax,hx8394
- frida,nt35510
- orisetech,otm8009a
- raydium,rm67162
- raydium,rm68200

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-10-07 17:11:58 +01:00
TOKITA Hiroshi
3f6bddc2bf drivers: mipi_dsi: Change MIPI_DSI priority to the same as DISPLAY
These priorities can be resolved automatically with the sub-priority
mechanism, so set them to the same value.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-10-07 17:11:58 +01:00
TOKITA Hiroshi
ef3847c3d8 drivers: mipi_dsi: Add dummy driver for vnd,mipi-dsi
Add dummy driver for "vnd,mipi-dsi" to use in build_all tests.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-10-07 17:11:58 +01:00
Xudong Zheng
e8c4867806 usb: cdc_acm: disable logging if used for shell with logging
This prevents recursive logging loop when USB CDC ACM is used for shell
with logging.

Change affects both USB stacks.

Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
2024-10-07 17:11:44 +01:00
Guillaume Gautier
2a67664c55 doc: releases: migration guide: stm32 adc async clock
Update the migration guide to indicate that the STM32 ADC that selects an
asynchronous clock also need to set a domain clock.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-10-07 13:40:06 +02:00
Guillaume Gautier
3c261c273b dts: bindings: adc: stm32: update adc bindings doc
Update ADC bindings documentation to state that a domain clock is now
necessary if asynchronous clock is selected.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-10-07 13:40:06 +02:00
Guillaume Gautier
9566d4ecb5 drivers: adc: stm32: add a check for asynchronous clock source
Add a compile-time check to verify that a domain clock is explicitly
defined if a STM32 ADC is configured to use an asynchronous clock.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-10-07 13:40:06 +02:00
Guillaume Gautier
111b2bb150 boards: st: add adc clock source if asynchronous clock is used
For all STM32 boards that define an asynchronous clock for ADC, specify
which clock is to be used in the clock node.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-10-07 13:40:06 +02:00
Guillaume Gautier
1d639aabe4 dts: arm: st: add default clock source for asynchronous ADC
For STM32L1, U5 and WBA, the ADC always uses an asynchronous clock source,
so we add the default clock source in the clock node.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-10-07 13:40:06 +02:00
Guillaume Gautier
46d4be75e0 drivers: clock_control: st: add missing bus source clocks
Add missing bus source clocks for STM32H5, U5 and WBA

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-10-07 13:40:06 +02:00
Guillaume Gautier
b27e36242b include: zephyr: dt-bindings: clock: st: add bus source clocks
Add missing bus source clocks define for STM32H5, L1, U5 and WBA

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-10-07 13:40:06 +02:00