This moves bt_has_client instance structure to has_internal.h header
file to be able to access to the instance members in tests.
Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
Erase operation with block of 64KByte
larger size than the default 4K sector size
if the flash supports.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The dictionary logging passed the full log_output structure
to the backend instead of the user context void pointer.
Signed-off-by: Kai Meinhard <meinhard@gessler.de>
Sets static analysis an indispensable requirement for our project
releases.
Static analysis is not merely a tool but a proactive
strategy to unearth and address potential issues in the early stages
of development, long before they mature into critical
vulnerabilities. By scrutinizing code at rest, static analysis unveils
latent defects and potential security risks, thus bolstering the
resilience of our software against future threats.
Fixes: #64591
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This makes sure the heap posix_timer_slab provides objects aligned
compatible with the type timer_obj. It was previously set to align at 4
bytes. One example where this failed was on the SPARC which requires
access to int64_t to be 8-byte aligned.
In particular, struct timer_obj contains fields of type k_timer_t and
struct _timeout.
With this commit we now get the information on required alignment for
struct timer_obj from the compiler by using __alignof__().
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
Without this, the hardware watchdog would expire if no task watchdogs were
registered within one hardware watchdog period after init. Start the
background channel immediately after init to avoid this.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
There was some discussion about whether it was suitable to have
an architecture-specific workaround in mqueue.c after that
workaround was copied to a different source file in a PR.
The original issue was that newlib and picolibc declare mode_t
to be unsigned short instead of unsigned long when __svr4__
is not defined along with __sparc__. This is specifically
impactful, because va_arg() deals (mainly) with 32-bit and
64-bit values that are all naturally aligned to 4 bytes.
#if defined(__sparc__) && !defined(__sparc_v9__)
#ifdef __svr4__
typedef unsigned long __mode_t;
#else
typedef unsigned short __mode_t;
#endif
A uint16_t is naturally aligned to 2 bytes, so not only would
a 16-bit mode_t be corrupted, it would also generate a warning
with recent gcc versions which is promoted to error (rightfully
so) when run through CI.
mqueue.c:61:35: error: 'mode_t' {aka 'short unsigned int'} is
promoted to 'int' when passed through '...' [-Werror]
61 | mode = va_arg(va, mode_t);
Instead of using an architecture-specific workaround, simply
add a build assert that the size of mode_t is less than or
equal to the size of an int, and use an int to retrieve it
via va_arg().
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
# Please enter the commit message for your changes. Lines starting
# with '#' will be kept; you may remove them yourself if you want to.
# An empty message aborts the commit.
#
# Date: Fri Dec 29 10:06:44 2023 -0500
#
# On branch posix-mqueue-always-use-int-for-mode-t-va-arg
# Changes to be committed:
# modified: lib/posix/mqueue.c
# modified: tests/posix/common/testcase.yaml
#
Use the __fallthrough directive on the switch fallthrough case and drop
the comment instead. This informs the compiler that the fallthrough is
intentional and silence any possible warning about it.
Drop the not reached case as I think that that part can actually be
reached since there are breaks in some of the cases.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Make sure we set the gcov tool in a consistent way and avoid issues
where path is set as Path instead of a string.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In theory one may want to build the POSIX compability shim
with a different C library than one provided with Zephyr,
so let's not prevent it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This reverts commit 6342aa3cc0.
This commit should never have been merged.
Apart from the fact that this change was rejected in previous
review,
this change is wrong, for 2 reasons:
1. The POSIX_API (POSIX compatibility shim) cannot be
built if the host libC is used.
2. The Zephyr libC CMake files were guarded so they
would not be dragged when CONFIG_EXTERNAL_LIBC was selected.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
* use _POSIX_AEP_REALTIME_DEDICATED instead of CONTROLLER
* use _POSIX_AEP_REALTIME_DEDICATED instead of MINIMAL in
comment
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
* remove unneeded line of code that duplicated the first part
of the SYS_SLIST_FOR_EACH_NODE() expansion.
* return NULL if pthread_self() is not a valid pthread
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
When package contained RO string positions and flag indicates that
they shall not be kept, length was miscalculated which could lead
to failures (e.g. memory corruption).
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add test case for converting statically generated package which
contains RO and RW indexes. Converting shall append RW string
and discard RO index.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add max size check to dac sam and sam0
There is no size check in dac_sam_write_value and dac_sam0_write_value.
Besides, the ret value should also be different.
Fixes#65021
signed-off-by: Gaetan Perrot <gaetanperrotpro@gmail.com>
Move reading PCIE_CONF_CMDSTAT before actual usage. There are four
return branches before value is used.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The previous implementation of the sys_arch_reboot function
for the Atmel SAM series was using NVIC_SystemReset.
This caused a reboot time of around 20 seconds on a SAM4SA16CA,
which is now reduced by directly writing to the
reset controller control register (RSTC_CR).
Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
Co-authored-by: Gerson Fernando Budke <nandojve@gmail.com>
Previously it was not possible to link to Zephyr's
POSIX API under lib/posix when building with
`CONFIG_EXTERNAL_LIBC=y`.
This small change allows that to work as expected.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Put parenthesis around parameters in K_SYSCALL_MEMORY_SIZE_CHECK
to avoid possible warnings during the macro expansion.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Remove the previously deprecated and non-standard macros
* PTHREAD_MUTEX_DEFINE()
* PTHREAD_COND_DEFINE()
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Since K_SYSCALL_MEMORY can be called with signed/unsigned size types, if
we check if size >= 0, static anlysis will complain about it when
size in unsigned.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add a defined(__DOXYGEN__) condition for the optional APIs so that they
get included in the documentation.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add an option to enable a input_kbd_matrix_actual_key_mask_set API to
enable or disable keys dynamically in the mask. This can be useful if
the exact key mask is determined in runtime and the device is using a
single firmware for multiple matrix configurations.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This change marks each instance of the 'rtc_driver_api' as 'static const'.
The rationale is that 'rtc_driver_api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
BinaryHandler.hanlde() method was trying to call GCOV and fails
silently because of incorrect call parameters. Moreover, even
being fixed, this call is not needed here as it attempts to
find and process .gcno and .gcna files (using wrong paths)
to create .gcov coverage text reports.
Currently the CoverageTool class does all data processing
and report generation using GCOVR or LCOV tools instead of
direct calls to GCOV.
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
Adopt the "MMU_REGION_DT_FLAT_ENTRY" macro to automatically generate
elements in "mmu_regions" according to devicetree "compatible" and
"status".
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Adopt the "MMU_REGION_DT_FLAT_ENTRY" macro to automatically generate
elements in "mmu_regions" according to devicetree "compatible" and
"status".
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Many peripherals have multiple instances, whether each of them
are enabled are not known. Adding all available instances into
"mmu_regions" array may not be the best choice.
This commit adds a macro to generate mmu region entry in "mmu_regions"
from devicetree. Used with "DT_FOREACH_STATUS_OKAY_VARGS", it generates
mmu region entry for all nodes enabled and compatiable to a certain
driver.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Refactored the socket state indication into its own function
that checks the state of TX queues as well as number of
pending CoAP responses.
Check the state after receiving a packet, as it might
have been a last Ack packet we have been waiting.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
On newer GCC version warnings were emitted because of a `memcpy`. The
size parameter was larger than the source's size because it was using
the size of the destination, which was a `bt_uuid_128` when the source
is a `bt_uuid_16`.
Fix the issue by creating a new variable for CCC UUID in both the
central and peripheral code. The variable need to be static because the
discover parameters must remain valid until the start of the discover
attribute callback.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Update documentation to include Raptor Lake P and update link to
the correct online datasheet.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Rename old rpl_crb to rpl_s_crb, which is needed for adding other
Raptor Lake boards. Main changes should be in the board device tree
configuration raptor_lake_p vs raptor_lake_s.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The W5500_EVB_PICO is an evaluation board for the Wiznet W5500
ethernet mac/phy based on the Raspberry Pi Pico.
Signed-off-by: Ian Wakely <raveious.irw@gmail.com>
The SPI STM32 Host Command backend doesn't use general SPI driver, so it
has to implement Power Management on its own.
The suspend procedure includes: setting pins to the sleep state,
disabling device clock and disabling CS pin interrupt.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
QEMU MMU tracing showed that there might be something wrong with
its Xtensa MMU implementation, which result in access violation
when running samples/userspace/hello_world_user.
Here is the MMU trace from QEMU from failed runs:
get_pte: autorefill(00109020): PTE va = 20000424, pa = 0010c424
get_physical_addr_mmu: autorefill(00109020): 00109000 -> 00109006
xtensa_cpu_tlb_fill(00109020, 1, 0) -> 00109020, ret = 0
xtensa_cpu_tlb_fill(00109028, 1, 0) -> 00109028, ret = 0
xtensa_cpu_tlb_fill(00109014, 0, 2) -> 00103050, ret = 26
The place where it fails is during reading from 0x109014.
From the trace above, the auto-refill maps 0x109000 correctly
with ring 0 and RW access with WB cache (which should be correct
the first time under kernel mode). The page 0x109000 is the libc
partition which needs to be accessible from user thread.
However, when accessing that page, the returned physical address
became 0x103050 (and resulting in load/store access violation).
We always identity map memory pages so it should never return
a different physical address.
After forcing TLB invalidation during page table swaps, the MMU
trace is:
get_pte: autorefill(00109020): PTE va = 20000424, pa = 0010c424
get_physical_addr_mmu: autorefill(00109020): 00109000 -> 00109006
xtensa_cpu_tlb_fill(00109020, 1, 0) -> 00109020, ret = 0
get_pte: autorefill(00109028): PTE va = 21000424, pa = 0010e424
get_physical_addr_mmu: autorefill(00109028): 00109000 -> 00109022
xtensa_cpu_tlb_fill(00109028, 1, 0) -> 00109028, ret = 0
get_pte: autorefill(00109014): PTE va = 21000424, pa = 0010e424
get_physical_addr_mmu: autorefill(00109014): 00109000 -> 00109022
xtensa_cpu_tlb_fill(00109014, 0, 2) -> 00109014, ret = 0
xtensa_cpu_tlb_fill(00109020, 0, 0) -> 00109020, ret = 0
Here, when the same page is accessed, it got the correct PTE
entry, which is ring 2 with RW access mode (but no cache).
Actually accessing the variable via virtual address returns
the correct physical address: 0x109014.
So workaround that by forcing TLB invalidation during page swap.
Fixes#66029
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
