we have four i2C peripherals .
- three shared between stm32u031/73/83
- One between stm32u073/83
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
check if two or three I2C instances with same irq are enabled
at same time then enable shared_interrupt handler.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Some function pointers were being passed via `%p` to LOG_DBG, and this
was causing the following issues in SOF CI with the `sparse` checker:
subsys/llext/llext.c: error: arithmetics on pointers to functions
subsys/llext/llext.c: error: incompatible types for operation (+)
This patch fixes the issue by casting the function pointers to void*.
Also fix a misleading error message in `llext_get_fn_table()`.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
With this commit, it is now allowed to register any ISR and arg
combination for the same IRQ, except the case when the exact same
ISR-arg combination is already registered.
The previous assert logic had a restriction where the same ISR could not
be registered multiple times with different arguments.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
Added option to set the ASE count through the bap API, making ASE
configuration runtime available. The upper limit of ASEs are still
bound by the Kconfig options set for ASEs.
Signed-off-by: Fredrik Danebjer <frdn@demant.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
If the dispatcher is muxing the connection i.e., so there are two
services for the same port, then mark service socket descriptor
of the service with the socket number so that "net sockets" shell
command can show a proper value for it.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The socket services API has a limitation where the user data is shared
between file descriptors described in the same service.
This can cause problem in DNS dispatcher where each listened socket
needs to have their own dispatcher struct set as user data so that we
can map between dispatcher context and socket. Solve this by always
have a dispatcher table as user data, and then have the actual mapping
done via the dispatcher table when receiving data to the dispatcher socket.
Fixes#78146
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Dangling hyphens at the end of a line are usually a problem, ie. you
have an "hyphenated-word" and breaking it on two line will render it as
"hyphenated- word".
This commit fixes the few occurences of such dangling hyphens.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
There are numbers of drivers for different PCA(L) series chip. They
share similiar register layout and control logic. This driver intends
to unify these drivers for PCA(L)xxxx series i2c gpio expanders.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Implement an option manual reset of the PCAL64XXA to allow the external
implementation of a retention of the port expander state.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Extract method which applies the initial state in the driver
for the port expander PCAL64XXA.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
There are 6 Cortex-A55 cores on i.MX95 EVK, this SMP variant will release
all the 6 cores to run Zephyr.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The IMX95LPD5EVK-19 board is a platform designed to show the most
commonly used features of the i.MX 95 automotive applications
processor. It is an entry-level development board, which helps
developers to get familiar with the processor before investing a
large amount of resources in more specific designs.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The i.MX95 applications processor features advanced graphics and
video cores, powerful vision and machine learning acceleration,
efficient CPU performance, real-time processing, and advanced
security with the integrated EdgeLock® secure enclave to support
energy-efficient edge computing.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
On some i.MX SoCs, such as i.MX95, the System Manager is running on a
Cortex-M core to manage the hardware resources and provide services for
SCMI requests.
So add the SCMI-based pinctrl driver to support these i.MX SoCs.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The MU init should be very early for some platforms. For examples,
i.MX95 is using MU for ARM SCMI. It should be initialzied early
for next power, pinctrl, clock etc. management.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Adds "chosen,uart-mcumgr" for nxp boards that support
the secondary bootloader partitioning.
Fixes the subsys\mgmt\mcumgr\smp_svr sample.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
GRTC needs to use direct clock source path instead of system clock path
to support ELV mode for nRF54L targets.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
