Add support for setting DSCP/ECN values for an outgoing ping request.
Additionally, copy DSCP/ECN values from an incoming ping request into
the ping response, like Linux does.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add new socket options IP_TOS and IPV6_TCLASS which allows to set
DSCP/ECN values on a socket for an outgoing packet IPv4/IPv6 headers.
The options are compatible with Linux behaviour, where both DSCP and ECN
are set with a single socket option.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
SOL_SOCKET and IPPROTO_TCP levels were missing the break statement at
the end of their processing logic, which could cause unexpected
fallthrough on unhandled optname value.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add a new net_context option, which allows to set DSCP/ECN values on a
net context. Those values are then encoded into outgoing packet
IPv4/IPv6 header.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add new fields to the net_pkt structure, representing IP-specific
Differentiated services code point (DSCP) and Explicit Congestion
Notification (ECN) values. Those values are encoded in legacy
Type of Service (IPv4) and Trafic Class (IPv6) header fields.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Device state (struct device_state) was not aligned, required since all
states are gathered together in the z_devstate section. This was causing
boot failures on certain platforms depending on the layout of the struct
device_state.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This fixes a random crash caused by race condition in the eswifi
driver used by the disco L475 iot1 board.
Signed-off-by: Michał Zając <m.zajac@avsystem.com>
Adds open drain support to atmel,sam-gpio drivers, by writing to the
PIO_MDER or PIO_MDDR registers during gpio configure.
Signed-off-by: Nick Kraus <nick@nckraus.com>
Add NULL checks when registering the media_proxy_pl_calls.
Currently the media player expects all of them to be set.
In the future, ideally the callbacks would mostly be
optional and reflect which of the optional
characteristics that there is in the MCS.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Convert model_ackd_send and model_send from health_cli.c to a common API
to get rid of code duplication in other client models that implement
synchronous messages' sending.
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
Brings a few quality-of-life improvements for Zephyr, notably:
- No more collision with ARRAY_SIZE()
- C++ improvements
Add entry in release notes.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
This commit updates the `getaddrinfo` test to use the newlib nano
variant when available because it can run out of RAM with the newlib
full variant on the platforms with a small RAM.
Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
This commit removes explicit `CONFIG_NEWLIB_LIBC_NANO=n` overrides
because the newlib nano variant is no longer enabled by default when
it is available.
Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
The newlib nano variant is currently enabled by default when
`CONFIG_NEWLIB_LIBC=y` and the selected toolchain-architecture
combination includes the newlib nano variant support, even if
`CONFIG_NEWLIB_LIBC_NANO` is not selected by the user.
When `CONFIG_NEWLIB_LIBC=y`, this results in the newlib nano variant
being selected for some architectures (e.g. ARC, ARM and RISC-V), while
the full variant is selected for the rest of the architectures.
The above behaviour is problematic because there exist functional
differences between the newlib full and nano variants (e.g. C99 format
modifiers such as `hh`, `ll`, `z`, `j` and `t` are not available in the
newlib nano variant), and this effectively leads to different level of
C standard support across different architectures when
`CONFIG_NEWLIB_LIBC=y`.
This commit fixes this problem by making the `CONFIG_NEWLIB_LIBC_NANO`
not `default y` and requiring its user to explicitly set this symbol to
`y` when they want to use the newlib nano variant.
Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
clock_stm32_ll_common.h was missing <stdint.h> and <zephyr/device.h>. It
turns out things worked because <zephyr/init.h> has a forward
declaration of struct device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Update cmake related files that are used by simulators to use
CONFIG_MP_MAX_NUM_CPUS instead of CONFIG_MP_NUM_CPUS as we work to
phase out CONFIG_MP_NUM_CPUS.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
The reasons for using inline assembly is as follows:-
1. Prevent the compiler from doing funny optimizations. For eg
generating four ldrb instructions to read a 32 bit word. This may cause
an abort on certain MMIO registers.
2. Prevent the compiler from generating post indexing instructions. These
instructions are not supported on hypervisor when used to access emulated
MMIO regions.
Thus, we have used inline assembly similar to aarch64.
Also, see the linux commit id '195bbcac2e5c12f7fb99cdcc492c3000c5537f4a'
for reference.
Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com>
Move the FS_BASE MSR code to to the top of __resume to ensure
that %fs relative addressing run in the thread switching hook
works.
Signed-off-by: Keith Packard <keithp@keithp.com>
The dummy thread doesn't include a TLS area, so any thread local variables
will fail to work if used in the switched_out tracing hook. Skip the hook
in this case, as it's not really accurate anyways; the dummy thread is
only used to set context for the initial switch for each core.
Signed-off-by: Keith Packard <keithp@keithp.com>
Andrzej is no longer involved directly in Zephyr, but remains connected
to the MCUboot project. Replace his maintainership with either other
people from Nordic or leave the subsystem "orphaned" (i.e. labeled as
odd fixes).
Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an
SMP/MCUmgr collaborator.
Finally, removed @aunsbjerg from mcumgr path maintainership, since he's
already assigned to the UDP platform implementation, which is what he is
an owner of.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Andrzej is no longer involved directly in Zephyr, but remains connected
to the MCUboot project. Replace his maintainership with either other
people from Nordic or leave the subsystem "orphaned" (i.e. labeled as
odd fixes).
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
There should be functional equivalence between these two forms. And the
'_eq'-form is more readable.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
The sysbuild documentation refers to CMakeLists.txt which can lead the
user to believe this call can be added to the <sample>/CMakeLists.txt
file.
This file is sourced as part of the Zephyr CMake build and not sysbuild
CMake build.
Therefore change the description to sysbuild.cmake.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Adds bt610 and bl5340_dvk_cpuapp* targets to exclusion list for tests
as these boards enabled i2c by default for GPIO usage which conflicts
with the test.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
As the parameter of "MAX" is uint32, the nagetive number will be
bigger than 0. The MAX function does not work as expected. So
change it to if/else form.
Fixes#51146
Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
The commit f10fa0dea8 mapped the
Cortex-R52 processor type to use the "VFPv3" FPU type, but the
toolchain requires the "FPv5" FPU type and refuses to assemble
floating-point instructions when the "VFPv3" FPU type is specified.
This commit updates the build script to specify the FPU type of
`fpv5-sp-d16` when the processor is configured with a single-precision
FPU, and `neon-fp-armv8` when the processor is configured with a
double-precision + Advanced SIMD-capable FPU.
Note that the `fp-armv8` FPU type is an alias for double-precision FPv5
with 32 double-precision registers (refer to the GCC
`gcc/config/arm/arm-cpus.in` for more details); NEON is always
specified in case of a double-precision configuration because the
Cortex-R52 can only be configured as such.
Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
