Remove code which looking for `cld` process pid - this functionality
isn't use anymore by twister. And as manual MDB termination is also
fixed now this functionality isn't required for anything now.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Currently we try to start MDB (MetaWare Debugger) in background
with ignored sigint no matter if we are planing to do debug
session (via `west debug`) or just run something on HW or on
nSIM (via `west flash`)
That cause really bad user experience as after we do
`west debug` or `west flash` we can't terminate the debugger
from the console. Moreover even if we terminate the debugger
process from separate terminal the console stil would be
broken so we need to do `stty sane` in it to make it usable
again.
Fix all that by proper starting the debugger process.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
On some STM32 MCUs SEGGER RTT is only working with realtime updates
when DMA is clocked. The STM32U5 series uses a new DMA controller
module called GPDMA.
Refs: #34324Fixes: #54316
Signed-off-by: Almin Iriskic <almin.iriskic@student.tugraz.at>
In this test suite, the actual peer interacting with the TCP stack is
the test suite itself, therefore all test cases should take care to
finalize the underlying TCP connection before ending, not to interfere
with other test cases.
This was not the case for test_server_out_of_order_data(), which
although released the underlying context on their side, did not finalize
the connection at the TCP level, i. e. did not reply for the FIN packet
etc.
As it seems to be unnecessary overhead to implement the full connection
teardown for the test case, simply send a RST packet to abort the
connection at the TCP level before releasing the context.
This was causing occasional failures in this test suite, as the FIN
packets retransmitted by the TCP stack could interfere with other test
cases logic.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The net_context recv callback used by the test suite did not release the
net_pkt provided, causing packet leak. Since the test suite allocated
plenty of packets, it wasn't visible, however could become a problem if
more tests are added.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The driver is missing the GPIO initialization entirely, meaning that
flags like PULL_UP are not currently being applied. Add the missing
call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the check_compliance main invocation to pass an explicit argv
list from main to parse_args(). This does not change anything for direct
invocation, but allows wrapping the compliance script and using it as a
library while controlling its behavior by passing the intended flags to
main().
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Secure/Non secure partition for target b_u585i_iot02a has been
updated in TF-M v1.7.0, giving more space to bl2 and TF-M.
As a consequence, non secure partition is shifted.
Align fully b_u585i_iot02a_ns flash partition to TF-M partition.
Note that proposed mcuboot partition encompasses following sections in
TF-M flash layout:
- SCRATCH (64KB)
- BL2 - MCUBoot (88KB)
- BL2 - NOHDP (4KB)
- OTP Write Protect (4KB)
- NV counters area (16KB)
- Secure Storage Area (16KB)
- Internal Trusted Storage Area (32KB)
Additionally describe secondary partitions that could be used for
secondary images storage.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The introduction of cc2c05a90c caused
CONFIG_MCUX_LPTMR_TIMER to always be enabled for boards where the NXP LPTMR
is enabled in the board devicetree.
Using this low-power timer as system timer only makes sense when using
power management. Otherwise, it just results in a lower tick resolution and
non-tickless operation.
Add dependency on CONFIG_PM for CONFIG_MCUX_LPTMR_TIMER.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Enables the watchdog timer within the DTS of supported boards,
add sample overlays showing how to use NMI WDT interrupts and
updated the board features inside the boards' doc / yaml files.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
New Zephyr WDT driver for TI CC13xx/CC26xx family.
Supports interrupts & MCU soft reset on timeout.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
When CONFIG_SOC_ISR_SW_UNSTACKING is defined, it's up to the custom soc
code to remove the ESF, because the software-managed part of the ESF is
depending on the hardware. Fix this in the ISR code.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Tracing macros expect trace ENTER defines to end
with 'enter.
Correct 'k_fifo_peek_head' and 'k_fifo_peek_tail'
defines to end with 'enter' rather than 'entry'.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Fix two "unused variable" warnings when compiling with assertions
disabled. The two variables are used only in the __ASSERT() call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Allow cross-compile toolchain for all ARC target which support zephyr
toolchain.
This aligns the behavior between ARC targets - as some of them
were supporting zephyr toolchain but weren't supporting cross-compile
toolchain (which wasn't actually true).
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
The RISC-V FPU context switching code is intricate and sometimes subtle.
Here's a test that exercizes various code paths to ensure they work as
intended, and to confirm that the target hardware does behave as
expected too.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Some implementations may not capture the faulting instruction in mtval
and set it to zero when an illegal instruction fault is raised This is
notably the case with QEMU version 7.0.0 when a CSR instruction is
involved.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The FRCSR, FSCSR, FRRM, FSRM, FSRMI, FRFLAGS, FSFLAGS and FSFLAGSI
are in fact CSR instructions targeting the fcsr, frm and fflags
registers. They should be caught as FPU instructions as well.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
- IRQ state for the interrupted context corresponds to the PIE bit not
the IE bit.
- Restoring the saved FPU state should clear the entire field before
or'ing wanted bits in.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
With all of the test suite issues on this board fixed, qemu_x86_tiny should
now be usable with picolibc.
Signed-off-by: Keith Packard <keithp@keithp.com>
This test has trouble on qemu_x86_tiny and randomly generates a Double
Fault error. I couldn't get it to reliably run with picolibc as a Double
Fault usually occured before the test completed.
I spent a couple of hours attempting to track this down and found that it
happens when code pages for the main thread get unmapped because the
qemu_x86_tiny intentionally offers very few available PTEs.
Work around this by just using the minimal libc for this test.
Signed-off-by: Keith Packard <keithp@keithp.com>
Add another clause in the test_ram_perms code to verify that any pinned
regions have the correct flags.
Signed-off-by: Keith Packard <keithp@keithp.com>
When there's no malloc heap needed for picolibc, don't reserve
the page frames that would be needed. This makes sure
the kernel.demand_paging tests provoke the page faults as
expected.
Signed-off-by: Keith Packard <keithp@keithp.com>
For RISC-V, the reg property of a cpu node in the devicetree describes
the low level unique ID of each hart. Using devicetree macro's, a list
of all cpus with status "okay" can be generated.
Using devicetree overlays, a hart or multiple harts can be marked as
"disabled", thus excluding them from the list. This allows platforms
that have non-zero indexed SMP capable harts to be functionally mapped
to Zephyr's sequential CPU numbering scheme.
On kernel init, if the application has MP_MAX_NUM_CPUS greater than 1,
generate the list of cpu nodes from the device tree with status "okay"
and map the unique hartid's to zephyr cpu's
While we are at it, as the hartid is the value that gets passed to
z_riscv_secondary_cpu_init, use that as the variable name instead of
cpu_num
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
RISC-V multi-hart systems that employ a heterogeneous core complex are
not guaranteed to have the smp capable harts starting with a unique id
of zero, matching Zephyr's sequential zero indexed cpu numbering scheme.
Add option, RV_BOOT_HART to choose the hart to boot from.
On reset, check the current hart equals RV_BOOT_HART: if so, boot first
core. else, loop in the boot secondary core and wait to be brought up.
For multi-hart systems that are not running a Zephyr mp or smp
application, park the non zephyr related harts in a wfi loop.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
Fix a build error when the driver is built with:
CONFIG_PM=y
CONFIG_PM_DEVICE=n
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_CONSOLE_INPUT_EXPIRED=y
due to uart_xec_pm_policy_state_lock_get() and rx_refresh_timeout_work()
declared under different configuration options.
Fixes: 343d1919f1 "uart: microchip: add low power & wake support"
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
To follow the IWDG configuration sequence, the timeout install is
just preparing the reload and prescaler parameters.
Then during the iwdg setup the watchdog is enabled and configured
at the same time.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
These tests test the basic functionality of creating
object and resource instances, setting buffers, writing
and reading to and from resources, and setting and triggering
callbacks.
Signed-off-by: Jarno Lämsä <jarno.lamsa@nordicsemi.no>
`ad_len` was never initiatialized before we started
incremetenting and using it.
We would also override any user data in ad_init, which
is fixed by using the length of the user data as an
offset into the array.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Using the same memory as a user data pointer and FIFO reserved space
could lead to a crash in certain circumstances, those two use cases were
not completely separate.
The crash could happen for example, if an incoming TCP connection was
abruptly closed just after being established. As TCP uses the user data
to notify error condition to the upper layer, the user data pointer
could've been used while the newly allocated context could still be
waiting on the accept queue. This damaged the data area used by the FIFO
and eventually could lead to a crash.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
1. Do not copy over the data to the local buffer,
it can be directly sent to the controller. The
cache is flushed before calling the HAL send
function. Also do not allocate a buffer from
the heap pool for the write operation.
2. Remove a length check as this is handled by
the HAL driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
