Commit graph

56,286 commits

Author SHA1 Message Date
Peter Bigot
fb151e81ec samples: shell: fs: fix partition reg
A change to the previous partition resulted in the unit address being
inconsistent with the reg property.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-09-08 14:05:23 +02:00
David Leach
a775d73528 random: rand32_ctr_drbg: Fix missed device constify change
Device constify PR missed changes needed within the mbedtls
conditional code.

Fixes #28033

Signed-off-by: David Leach <david.leach@nxp.com>
2020-09-08 14:03:01 +02:00
Torsten Rasmussen
5c10eafb2b cmake: improved handling of CONF_FILE cached variable
Fixes: #28134

Minor fix for correctly testing if CONF_FILE variable is defined, and
if it is defined, then a current scope variable will be set with same
name. For a variable that is already present in current scope this has
no effect, but a cached variable (such as one provided with -DCONF_FILE)
will now have both a current scope and cached definition.
This ensures that current scope CONF_FILE will continue to be defined
even when the cached variable is cleared later.

Clearing of the cached variable ensures correct detection if user later
re-invokes CMake with a new -DCONF_FILE value.

The cached version is cleared later in favor of the CACHED_CONF_FILE
that is used between multiple CMake invocations.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-09-08 14:01:54 +02:00
Jukka Rissanen
8c3efc7be5 doc: net: Add networking changes to 2.4 release note
Initial set of networking related changes in 2.4 release.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-09-08 11:47:58 +02:00
Alexandre Bourdiol
4d3580d297 tests: benchmarks: data_structure_perf: rbtree: uninitialized field
Initialize root field to NULL, so that 'test_tree_l.roo.max_depth'
will be assigned a valid value in function rb_insert().

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-09-08 09:42:27 +02:00
Peter Bigot
113d9274ea drivers: ethernet: remove stray expression
An unnecessary expression that doesn't compile was inadvertently
introduced in the device constification PR.  Remove it.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-09-08 09:36:54 +03:00
Torsten Rasmussen
27e1fd69f9 cmake: c++ compiler flag exclusion, -Werror=implicit-int
Fixes: #28097

The compiler warning flag `-Werror=implicit-int` was added using
`set_compiler_property()` which will always add the compiler flag if the
compiler flag supports it.

This has been changed to `check_set_compiler_property()` which will
check if the flag is among the list of `CXX_EXCLUDED_OPTIONS`, and only
adds the flag if both the compiler supports it, and it is not an
excluded option.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-09-07 17:22:37 +02:00
Ioannis Glaropoulos
2e87e33dd1 doc: release: v2.4.0 release notes draft for Cortex-A
Initial draft of release notes for AARCH64 (Cortex-A)
for the Zephyr v2.4.0 release.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-07 17:04:10 +02:00
Ioannis Glaropoulos
d378a1b0e6 doc: release: v2.4.0 release notes draft for Cortex-M
Initial draft for Release notes for ARM (Cortex-M)
for the Zephyr v2.4.0 release.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-07 17:04:10 +02:00
Emil Obalski
613726728f usb: clock_control: Fix symbol when getting mgr for HFCLK
When getting a hfxo manager for USB sybsystem incorrect symbol
was checked. This lead to always enabling HFCLK, even for nRF5340
which needs HFCLK192M.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2020-09-07 16:47:02 +02:00
Emil Obalski
7f43fec094 usb: Fix for is_ep_valid
is_ep_valid() function was incorrectly searching through
all used endpoints. All endpoints for class must be checked
if they match requested endpoint.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2020-09-07 16:44:54 +02:00
Vinayak Kariappa Chettimada
61b6534727 Bluetooth: controller: Scanning with unreserved window
Added a Kconfig option to enable scanner with unreserved
scan window when in continuous scan mode. This will permit
scanner to be always pre-empted by other roles, making it
the lowest in priority when it comes to using the radio.

Fixes #27414.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2020-09-07 15:11:33 +02:00
Erwan Gouriou
491a426639 CODEOWNERS: Add reviewers on stm32 components
Based on recent contributions, add reviewers on some
STM32 components.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-07 14:19:29 +02:00
Erwan Gouriou
122e2fcc9e CODEOWNERS: aplhabetical sorting
Some lines were not at the expected place.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-07 14:19:29 +02:00
Maureen Helm
016b5422d9 release: Zephyr 2.4.0-rc1 v2.4.0-rc1
Set version to 2.4.0-rc1

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-09-05 14:16:13 -05:00
Henrik Brix Andersen
63f8a40781 tests: drivers: spi: loopback: run SPI loopback test in sanitycheck
Run the SPI loopback test in sanitycheck if the board supports
internal loopback mode.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-05 14:02:43 -05:00
Ioannis Glaropoulos
394d2912a1 arch: arm: cortex-m: implement timing.c based on DWT
For Cortex-M platforms with DWT we implement
the timing API (timing.c).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-05 13:28:38 -05:00
Ioannis Glaropoulos
61d1d2ea06 soc: arm: nrf: conditionally employ nRF-specific timing framework
Employ the nRF-specific timing calculations framework
(based on TIMER peripheral) only if the DWT is not present
on the SoC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-05 13:28:38 -05:00
Ioannis Glaropoulos
a681291ef4 soc: arm: nordic nrf: use bitmode-16 for timing measurements in nrf51
nRF51 TIMER2 periperhal does not have the 32-bit
bitmode, so we need to fallback to the bitmode 16.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-05 13:28:38 -05:00
Ioannis Glaropoulos
6f84d7d3fd arch: arm: cortex_m: conditionally select ARCH_HAS_TIMING_FUNCTIONS
Cortex-M SoCs implement (optionally) the Data Watchpoint and
Tracing Unit (DWT), which can be used for timing functions.
Select the corresponding ARCH capability if the SoC implements
the DWT.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-05 13:28:38 -05:00
Anas Nashif
01bcd0d7e5 doc: remove benchmarking section from docs
This section does not exist anymore.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif
6f729383a8 tests: timestamp: minor cleanup
Minor cleanup and fixes.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif
e90a4bb6b3 tests: latency_measure: Using timing functions
Use new timing API instead if local macros and functions. Add new
becnhmarks for threads and semaphore and change the output to be
parseable.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif
4b41cb14a8 soc: mec1501: add timing support
Use custom timing implementation specific for this SoC.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif
6e27478c3d benchmarking: remove execution benchmarking code
This code had one purpose only, feed timing information into a test and
was not used by anything else. The custom trace points unfortunatly were
not accurate and this test was delivering informatin that conflicted
with other tests we have due to placement of such trace points in the
architecture and kernel code.

For such measurements we are planning to use the tracing functionality
in a special mode that would be used for metrics without polluting the
architecture and kernel code with additional tracing and timing code.

Furthermore, much of the assembly code used had issues.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif
150c82c8f9 arch: nios2: add timing implementation
Add timing implementation for NIOS2 architecture.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif
a180b33c55 timing: add support for nordic SoCs with RTC timer
Add abstraction for nordic SoCs using Nordic RTC as the source for
timestamps and cycles.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif
d896decb79 timing: add support for x86
Add initial support for X86 and get timestamps from tsc.

Authored-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif
5dec235196 arch: default timings for all architectures
Use default if architecture does not have a custom timing
implementation.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Daniel Leung
0ffcfa9633 timing: introduce timing functions as a generic feature
Add timing functions and APIs.  This is now used with some of the tests
we have for performance and metrics and will be used whereever timing
informations are needed, for example for tracing, profiling and other
operations where timing info is critical.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Daniel Leung
80fb6538b3 x86: use =A as output for RDTSC on x86-32
The timing_info benchmark on qemu_x86 shows this is a bit faster.

Before:
  START - Time Measurement
  Timing results: Clock frequency: 1000 MHz
  Context switch                               : 896 cycles ,   895 ns
  Interrupt latency                            : 768 cycles ,   767 ns
  Tick overhead                                :14912 cycles , 14911 ns
  Thread creation                              :18688 cycles , 18687 ns
  Thread abort (non-running)                   :49216 cycles , 49215 ns
  Thread abort (_current)                      :55616 cycles , 55615 ns
  Thread suspend                               :11072 cycles , 11071 ns
  Thread resume                                :10272 cycles , 10271 ns
  Thread yield                                 :12213 cycles , 12212 ns
  Thread sleep                                 :17984 cycles , 17983 ns
  Heap malloc                                  :21702 cycles , 21701 ns
  Heap free                                    :15176 cycles , 15175 ns
  Semaphore take with context switch           :19168 cycles , 19167 ns
  Semaphore give with context switch           :18400 cycles , 18399 ns
  Semaphore take without context switch        :2208 cycles ,  2207 ns
  Semaphore give without context switch        :4704 cycles ,  4703 ns
  Mutex lock                                   :1952 cycles ,  1951 ns
  Mutex unlock                                 :7936 cycles ,  7935 ns
  Message queue put with context switch        :20320 cycles , 20319 ns
  Message queue put without context switch     :5792 cycles ,  5791 ns
  Message queue get with context switch        :22112 cycles , 22111 ns
  Message queue get without context switch     :5312 cycles ,  5311 ns
  Mailbox synchronous put                      :27936 cycles , 27935 ns
  Mailbox synchronous get                      :23392 cycles , 23391 ns
  Mailbox asynchronous put                     :11808 cycles , 11807 ns
  Mailbox get without context switch           :20416 cycles , 20415 ns
  Drop to user mode                            :643712 cycles , 643711 ns
  User thread creation                         :652096 cycles , 652095 ns
  Syscall overhead                             :2720 cycles ,  2719 ns
  Validation overhead k_object init            :4256 cycles ,  4255 ns
  Validation overhead k_object permission      :4224 cycles ,  4223 ns
  Time Measurement finished

After:
  START - Time Measurement
  Timing results: Clock frequency: 1000 MHz
  Context switch                               : 896 cycles ,   895 ns
  Interrupt latency                            : 768 cycles ,   767 ns
  Tick overhead                                :14752 cycles , 14751 ns
  Thread creation                              :18464 cycles , 18463 ns
  Thread abort (non-running)                   :48992 cycles , 48991 ns
  Thread abort (_current)                      :55552 cycles , 55551 ns
  Thread suspend                               :10848 cycles , 10847 ns
  Thread resume                                :10048 cycles , 10047 ns
  Thread yield                                 :12213 cycles , 12212 ns
  Thread sleep                                 :17984 cycles , 17983 ns
  Heap malloc                                  :21702 cycles , 21701 ns
  Heap free                                    :15176 cycles , 15175 ns
  Semaphore take with context switch           :19104 cycles , 19103 ns
  Semaphore give with context switch           :18368 cycles , 18367 ns
  Semaphore take without context switch        :1984 cycles ,  1983 ns
  Semaphore give without context switch        :4480 cycles ,  4479 ns
  Mutex lock                                   :1728 cycles ,  1727 ns
  Mutex unlock                                 :7712 cycles ,  7711 ns
  Message queue put with context switch        :20224 cycles , 20223 ns
  Message queue put without context switch     :5568 cycles ,  5567 ns
  Message queue get with context switch        :22016 cycles , 22015 ns
  Message queue get without context switch     :5088 cycles ,  5087 ns
  Mailbox synchronous put                      :27840 cycles , 27839 ns
  Mailbox synchronous get                      :23296 cycles , 23295 ns
  Mailbox asynchronous put                     :11584 cycles , 11583 ns
  Mailbox get without context switch           :20192 cycles , 20191 ns
  Drop to user mode                            :643616 cycles , 643615 ns
  User thread creation                         :651872 cycles , 651871 ns
  Syscall overhead                             :2464 cycles ,  2463 ns
  Validation overhead k_object init            :4032 cycles ,  4031 ns
  Validation overhead k_object permission      :4000 cycles ,  3999 ns
  Time Measurement finished

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-09-05 13:28:38 -05:00
Daniel Leung
c234821861 x86: use LFENCE instead of CPUID before reading TSC for x86_64
According to Intel 64 and IA-32 Architectures Software
Developer’s Manual, volume 3, chapter 8.2.5, LFENCE provides
a more efficient method of controlling memory ordering than
the CPUID instruction. So use LFENCE here, as all 64-bit
CPUs have LFENCE.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-09-05 13:28:38 -05:00
Daniel Leung
8197bdea2b tests: timing_info: remove timing info
Remove this benchmark which was relying on custom tracing points in the
code and was not scalable. Use latency_measure benchmark instead which
is more realistic and measures similar metrics in a fully reproducible
manner and on all supported architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-09-05 13:28:38 -05:00
Johann Fischer
362d8b27a7 drivers: usb_dc_mcux_ehci: fix endpoints index assignment
MCUX EHCI USB device controller supports a specific
number of bidirectional endpoints. Bidirectional means
that an endpoint object is represented to the outside
as an OUT and an IN Eindpoint with its own buffers
and control structures.

ep_abs_idx index refers to the corresponding control
structure, for example:

 EP addr | ep_idx | ep_abs_idx
-------------------------------
 0x00    | 0x00   | 0x00
 0x80    | 0x00   | 0x01
 0x01    | 0x01   | 0x02
 0x81    | 0x01   | 0x03
 ....    | ....   | ....

The NUM_OF_EP_MAX (and number of s_ep_ctrl) should be double
of num_bidir_endpoints. There is also no need to reserve
endpoint addresses for this controller type.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-09-05 10:49:37 -05:00
Henrik Brix Andersen
2f95794b29 doc: releases: 2.4: add EEPROM release notes for v2.4
Add EEPROM release notes for v2.4.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-09-05 10:26:58 -05:00
Torsten Rasmussen
9aa4039d41 cmake: MWDT linker command list fix.
This commit fixes an issue where the list returned by
zephyr_get_include_directories_for_lang() would be a space separated
list, cause the arguments to be quoted during linking.

This is fixed by requesting `$<SEMICOLON>` to be used as separated which
which again ensures a correct expansion of the list.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-09-05 10:22:56 -05:00
Torsten Rasmussen
571f48fc77 cmake: mwdt bintools adopted to new toolchain abstraction
This commit converts the MWDT bintools implementation from the old
macro based approach and into the new toolchain property scheme.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-09-05 10:22:56 -05:00
Torsten Rasmussen
93e063ffc8 cmake: mwdt compiler adopted to new toolchain abstraction
This commit converts the MWDT compiler implementation from the old
macro based approach and into the new toolchain property scheme.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
05b6468a73 ARC: linker: add more place for optimization
Do not force linker to place text sections after each other
to have more freedom to optimize.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
3a9bc23ad9 ARC: SOC: NSIM: fix CMakeLists indentation
No functional changes intended

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
6dfaac0c95 cmake: allow to specify compliler for DTS preprocessing
MWDT CCAC compiler can't handle the dts file as gcc does, so
allow to specify compliler for DTS preprocessing which is differ
from ${CMAKE_C_COMPILER}.

Use ARC GNU compiler for DTS preprocessing in case of MWDT
toolchain.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
a28ec6201f isr_tables: don't whole-archive library
As of today we have a bit weird situation with generated
sw_isr_table / irq_vector_table tables.

On the final linkage stage we pass two files which content
section with sw_isr_table / irq_vector_table. They are
 * libarch__common.a (with an outdated tables from the first
   linkage stage)
 * isr_tables.c.obj (with an actual tables)

The sections where tables are located are marked with
".gnu.linkonce" prefix. That means:
<<<As a GNU extension, if the name begins with .gnu.linkonce,
we only link a single copy of the section.>>>

However the "libarch__common.a" is passed to linker with
"--whole-archive" option which means <<<include every object
file in the archive in the link, rather than searching the archive
for the required object files>>>

That combination confuses MWDT linker and breaks linkage with
MWDT toolchain.

As a simple fix we can move the sw_isr_table / irq_vector_table
sections to their own library and link this library with
"--no-whole-archive" option.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Wayne Ren
53e1d9866f ARC: board: nsim: enable metaware toolchain in sanitycheck
Enable MWDT toolchain in sanitycheck for all ARC nSIM boards

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
f609a9acd8 ARC: soc: add MWDT compiler options for nsim targets
Add metaware compiler options for nsim targets

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Wayne Ren
b868018b51 cmake: add metaware toolchain support in build system
* add metaware toolchain support in build system:
   * compiler
   * linker
   * binutils
     * gcc objcopy is used because it can't be replaced
       with mwdt's binutils currently
* To use ARC metaware toolchain, you'd better:
   * in Linux/Unix environment
   * install arc gcc/zephyr toolchain to use gnu's objcopy
     tool
   * set ZEPHYR_TOOLCHAIN_VARIANT=arcmwdt

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
2167ffbe45 ARC: toolchain: handle difference in macros for MWDT and ARC GNU
Create include/toolchain/mwdt.h to handle difference in
several macros for MWDT and ARC GNU toolchains.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
c2bb7db3fd ARC: linker: implement linker related definition for MWDT
Implement linker related definitions and macros for MWDT
toolchain.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
0a7b65ef5e linker: tweak section naming to feet all linkers
MWDT toolchain adds additional suffix to sections name in case of
ffunction-sections / fdata-sections are enabled.

As proposed by Andy Ross let's pick a single set of rules
and syntax that work.

Suggested-by: Andy Ross <andy@plausible.org>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Eugeniy Paltsev
6b8f92be08 app_memdomain: ARC: adjust asembler directives for MWDT toolchain
ARC MWDT assembler has slightly different directives names:
.pushsect instead of .pushsection
.popsect instead of .popsection

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Wayne Ren
cc897a5198 ARC: add linker script template for metware toolchain
Add linker script template for MWDT toolchain (linker-mwdt.ld)
Move linker.ld to linker-gnu.ld (without changes)

The "linker.ld" is wraper now.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-09-05 10:22:56 -05:00