Commit graph

7 commits

Author SHA1 Message Date
Andrew Boie
d9cfbd5a61 interrupts: new static IRQ API
The interrupt API has been redesigned:

- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
  It will be used in situations where the new static irq_connect()
  won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
  exactly the same way as its dynamic counterpart. The old static irq
  macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
  generated inline with irq_connect()

ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.

Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:17 -05:00
Andrew Boie
cb5022fdba ipm_quark_se: lock irqs while waiting for status bit to clear
Change-Id: Ieb0ac7a32a91826dca39ddb6bec80081c7d2c888
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:15 -05:00
Andrew Boie
4f0f7e3325 ipm_quark_se: don't wait for response with interrupts locked
If the remote handler tries to send a message back with wait enabled
it can lead to a deadlock.

Change-Id: Ife6eae29c10e8937abd1b6511ee605f7786c6a7a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:14 -05:00
Andrew Boie
08d3cd7bfd ipm: quark_se: fix dropped/repeating characters
The while loop on the status bit was unnecessary as we will get
a separate invocation of the ISR for every message. We also ensure
that the global status register bits for the channel being serviced
are cleared before exiting. Fixes an issue where some messages
would be dropped or repeated.

Some runtime checks that shouldn't happen in practice have been moved
to assertions.

Change-Id: Iedd28ae15522c7b9f59ef34fa9fa8b4e24e6be14
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:14 -05:00
Dirk Brandewie
0551ee0708 ipm: rework isr to service one set of requests at a time
Change-Id: I50604748cee1aeb43dc764f426d3a17fcc943cbe
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:25:12 -05:00
Anas Nashif
10bb38c186 Use SoC instead of platform.
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.

Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00
Andrew Boie
3589695508 ipi: rename to ipm
To many people, IPI connotes inter-processor interrupts on SMP
systems. Rename this to IPM, or Inter-Processor Mailboxes.

Change-Id: I032815e23c69a8297c0a43992132441c240fb71e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:04 -05:00