PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The driver originally gets the full-duplex configuration
from the PHCON1 register and PDPXMD bit as stated by the
ENC298J60 specification document section 2.6 "LED Configuration".
This section trust the board to LEDB connection to signal the
full-duplex configuration.
This commit gets the full-duplex configuration from Kconfig
symbols to allow a proper functionality even when the board
is not connecting LEDB apropriately.
Change-Id: I803958409a611e23e2c3e03f40b412f1695947af
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
There is a tx semaphore that controls a single access to the
transmission service. The device is capable to manage a single
transmission call at a time. Multiple requests need to wait
for the resource to be free.
This commit adds the initial release to the tx semaphore.
Jira: ZEP-895
Change-Id: Ic9879cfd15bb1494644b2cf0f4565f7e6a2c1c22
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
SPI bus is a shared resource between tx and rx processes.
The access to it must be synchronized to allow a rx process to
happen even when a tx process is taking place.
ECON1 register must be saved by the rx process and recovered
at the end to ensure that the tx process will continue operating
in the same register bank.
Change-Id: Ie9358bf02bef8ddb5bdf76c8847e998a627e5395
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
Transmision status is polled. Remove rx interruption enabling and
clearance.
Change-Id: I2893f89533adef5f77c711a36b5c1bbe21c48a23
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
Even values in ERXRDPT register may corrupt the receive buffer.
Set ERXRDPT value one address behind the next value.
If it is zero, set the value to the reception buffer end address.
Change-Id: I7150e5190c5bfb7bfafbff598eea1c26959643d0
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
The Receive Packet Pending Interrupt Flag (EIR.PKTIF) does not
reliably/accurately report the status of pending packets.
Reception fails intermittently. The EPKTCNT register is used instead.
Change-Id: I599c3b4df1b74d769dd7104e5c6e253d9cf63bd4
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
Adds the ENC28J60 Ethernet module driver.
Origin: Original
JIRA: ZEP-291
Change-Id: I2b5790ecb251f9059f172bcaafadef24bd27207a
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
