Though it's an ARC core, Quark SE SS does not follow the same registers
mapping as the official DesignWare document. Some parts are common, some
not.
Instead of bloating spi_dw.c with a lot of #ifdef or rewriting a whole
new driver though the logic is 99% the same, it's then better to:
- centralize common macros and definitions into spi_dw.h
- have a specific spi_dw_quark_se_ss_reg.h for register map, clock
gating and register helpers dedicated to Quark SE SS.
- have a spi_dw_regs.h for the common case, i.e. not Quark SE SS.
GPIO CS emulation and interrupt masking ends up then in spi_dw.h.
Clock gating is specific thus found in respective *_regs.h header.
Adding proper interrupt masks to quark_se_ss soc.h file as well.
One of the main difference is also the interrupt management: through one
line or multiple lines (one for each interrupt: rx, tx and error). On
Quark SE Sensor Sub-System it has been set to use multiple lines, thus
introducing relevant Kconfig options and managing those when configuring
the IRQs.
Quark SE SS SPI controller is also working on a lower level, i.e. it
requires a tiny bit more logic from the driver. Main example is the data
register which needs to be told what is happening from the driver.
Taking the opportunity to fix minor logic issues:
- ICR register should be cleared by reading, only on error in the ISR
handler, but it does not harm doing it anyway and because Quark SE SS
requires to clear up interrupt as soon as they have been handled,
introducing a clear_interrupts() function called at the and of the ISR
handler.
- TXFTLR should be set after each spi_transceive() since last pull_data
might set it to 0.
- Enable the clock (i.e. open the clock gate) at initialization.
- No need to mask interrupts at spi_configure() since these are already
masked at initialization and at the end of a transaction.
- Let's use BIT() macro when relevant.
Change-Id: I24344aaf8bff3390383a84436f516951c1a2d2a4
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This patch fixes the QMSI SPI shim driver so we are able to use it in
Quark D2000 based platforms. The only change required to enable this
driver is an #if guard in spi_qmsi_init() because the macro QM_SPI_MST_1
and the function qm_spi_master_1_isr are not defined in QMSI headers
from Quark D2000.
Since this drivers is now properly working on Quark D2000, this patch
also sets the QMSI driver default options in arch/x86/soc/quark_d2000/
Kconfig.
Change-Id: Ic6e2f7f5a2c3f350ddf360b23ffab6b812948572
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch removes the default value from some platform/SoC specific
options which are declared in drivers/watchdog/Kconfig because 1) most
of the time they are not valid values and 2) the correct values are
already set in the SoC Kconfig (e.g. arch/x86/soc/quark_d2000/Kconfig).
For Quark D2000, the IRQ priority options (WDT_DW_IRQ_PRI and WDT_QMSI_
IRQ_PRI) values are set to '0' since the priority information is ignored
by the interrupt registering system (the interrupt vectors are fixed in
this SoC).
Change-Id: I8f36c0f0e56211cdee3f2c6fc90c7dcac0a1b5aa
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch removes the default value from some platform/SoC specific
options which are declared in drivers/rtc/Kconfig because 1) most of
the time they are not valid values and 2) the correct values are
already set in the SoC Kconfig (e.g. arch/x86/soc/quark_d2000/Kconfig).
For Quark D2000, the RTC_IRQ_PRI default value is set to '0' since the
priority information is ignored by the interrupt registering system
(the interrupt vectors are fixed in this SoC).
Change-Id: I70de889cfd22e65f0e7acf7e57ddc6439f028394
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch fixes the GPIO QMSI shim driver so we are able to use it in
Quark D2000 based platforms. To enable this driver we have to add a few
#if guards because some macros and functions (e.g. QM_AON_GPIO_0 and
qm_aon_gpio_isr_0) are not defined in QMSI headers from Quark D2000
(this SoC doesn't support the Always-On GPIO controller).
This patch also adds the QMSI driver default options to arch/x86/soc/
quark_d2000/Kconfig.
Change-Id: Ia16a345e1de3008f167ed66f891834607c05f4a2
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This handling is already done by QMSI, so no need for it to be done in
Zephyr side as well.
Change-Id: Ia5c6206d3d7f04702e0be0e76f2130df8d60b31c
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This adds support to the AON GPIO controller using the QMSI driver.
In order to enable it, the following configuration options must be set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="PATH TO LIBQMSI"
CONFIG_GPIO_QMSI=y
CONFIG_GPIO_QMSI_AON=y
Change-Id: I5a1a232d97741ad7fdbf40d8aea5a835e5b4e724
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This patch fixes the QMSI I2C shim driver so we are able to use it in
Quark D2000 based platforms. The only change required to enable this
driver is an #if guard in i2c_qmsi_init() because the macro QM_I2C_1
is not defined in QMSI headers from Quark D2000.
Since this drivers is now properly tested with Quark D2000, this patch
sets the QMSI driver default options in arch/x86/soc/quark_d2000/Kconfig.
It also adds the wiring information required to test the i2c_lsm9ds0
sample app in the Quark D2000 CRB.
Change-Id: I4be03c09304da5a66ac663e48b1d72225eb5651d
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
bt_conn_lookup_handle() would be used in gatt.c to access conn's
discovery parameters.
Change-Id: Ibb494cf8af90ccab478fa7463a41942b06029539
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Store GATT discover parameters in bt_conn due to lack support from
NBLE RPC.
Change-Id: I47ade89b4861c9f1260ce3a3dc158d6344de334e
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
It was hard to see where the condition ended and the code block started.
Change-Id: If966b0a404beb1c783a1c8dd89e6049a6600cadf
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Always use braces, even on one-line code blocks.
Change-Id: Ic9e60db7f851d2fbee5bfd79cd810df23c0c5db0
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Cancel ongoing connect request when we receive disconnect command.
Change-Id: I12f1c1326c4b13672879b8f2dbe457cae395b486
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Implement bt_conn_disconnect() API function.
Change-Id: I08979d35400cf947d7ec646bad72f625141f95e0
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Introduce BT_GATT_ERR macro to make it possible for application
callbacks to return exact ATT error codes.
Change-Id: I971536508e75036fbddc40b3f33e5201e11940bc
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Connection state helps to keep make right choice when connecting /
disconnecting.
Change-Id: Ifea620c05f869a633f578bf5d5c8ba603a58a46a
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The 100ms wait was too short. After some debugging, the
packets were successfully sent after 250ms wait.
Change-Id: Ib367f8df81ed3039b041f1e7b46d8f562a0adcac
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
This debug option enables debug of Nordic RPC.
Change-Id: I2e963f10ed6407b836e1572673244cb0187227d2
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Use NBLE_DEBUG_GAP to enabled / disable GAP NBLE
debug.
Change-Id: Iefbb18e697d523137a101df00b02d46e209e7f14
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Implement Bluetooth LE scan start/stop API for Nordic.
Change-Id: I3dc153346d0135501091a4b952a3c60c081802db
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Implement bt_conn_create_le() and copy bt_le_conn_params_valid() from
net/bluetooth.
Change-Id: I6b3fff5027a82b8040c0c724eac1251945415f43
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Structure has changed in firmware headers.
Change-Id: I0df1549ce5353a2c7807f7839ee9270e833fbbf2
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Remove empty function declaration using weak autogenerated method.
This solves API to NBLE constantly changing problem.
Change-Id: I2ff90559dfbf78e9c34e602195d8a76ab9750a47
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The bt_conn_get_info() API also needs the local address. For now
simply use an extern declaration to get access to the variable that
resides in gap.c.
Change-Id: I3ddb598785cfb6a5d07fc10621f6d20a610536be
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The bt_conn_get_info() API requires that we track the role and the
various connection parameters.
Change-Id: I732eace1e45173f94962df3f11dbe5ad520a75cf
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Instead of return 0 if there is an error, return
a value < 0 so that caller caller of cc2520_read()
can reject packet right away.
Change-Id: I99808db6aa692cf4415f630193d35e51d4bc3144
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If current packet is being rejected, it will print some more cc2520
internal insights in debug mode.
Change-Id: If63225e7dd025fb239a7bac5638624accfcc7f4f
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
These are mostly cosmetic changes, shall work with firmwares
niko-0214 and niko-0215.
Change-Id: Id39c6b9cee6e759f77a05259632e453492ffe498
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Due to firmware update of NBLE starting from 02/12 revisions onwards
there is a need to sync RPC headers and functions.
Only to be used with above mentioned NBLE firmware!
Change-Id: Ifc2ce28f81e819bb517ef3891610d78089a00428
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
We should just discard the data if the received table index goes
beyond the actual table size.
Change-Id: I267621f098e349abab5a1f37f485a28448a9396b
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The data is in a net_buf already so we can just pass this to the
deserialization code. The net_buf context and API helps simplify the
code quite a lot.
Change-Id: Iecb62d3151d229a09538ad652508f1eb9c6c3ffc
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Applications may want to fine-tune the stack size of the fiber that's
used to make callbacks into the application.
Change-Id: I2cd3e79283fe85359389528e84d9bcc21e3e19f6
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Don't require being able to read the full header in a single ISR call.
Instead track the number of received header bytes. Also check for IPC
length before allocating buffer to avoid unnecessary buffer
allocations.
Change-Id: I1678c3ac3aaf35a1b9bbe930cc2e942fce3f458a
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This reverts commit 3c66686a43.
That commit fixed announcing ticks before the microkernel was up, but
prevented devices initializing before the MICROKERNEL level from having
access to the hi-res part of the system clock, which they could not poll
anymore.
Change-Id: Ia1c55d482e63d295160942f97ebc8e8afd1e8315
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Currently we have devices named "dw_spi_0" and "intel_spi_0" etc, which makes
it difficult for an application to look up. Or worse, forcing a 3rd party IP
to hardcode in support for only one specific IP block.
Change-Id: Ie485e2350b171b66b22cd7ab39e0fcd196f38af8
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Modifications to timer drivers and interrupt setup, to manage
the tickless idle for the x86 architecture
Change-Id: Ie02d484b7e5636de6ea382ba2eeed57e704c8498
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This is needed because in the microkernel, the system clock
is not yet running and the cc2520 driver needs that. By moving
the device initialization later, the clock gets to run and
the cc2520 driver works both in nanokernel and microkernel.
See also related commit 3c66686a43
for details.
Change-Id: Idc5530398b4cff2bb3e0955c8ab57c5f03344079
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
This allows to decrease number debug messages using config option.
Change-Id: I987d25c6d4b18503d6beb7feab97e9207100323d
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
