Commit graph

3 commits

Author SHA1 Message Date
Lucas Tamborrino
e282b0ea84 soc: esp32xx: refactor clock and RTC subsystems
The RTC subsystem in espressif's SOCs, among other tasks
is responsible for clock selection for CPU and for low
power domain clocks such as RTC_SLOW and RTC_FAST.

This commit allows for proper clock source and rate
selection for CPU, using the espressif,riscv and
espressif,xtensa-lx6/7 bindings.

It also enables clock selection for RTC_FAST and RTC_SLOW,
that impacts some peripherals, such as rtc_timer.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2024-05-27 01:37:18 -07:00
Henrik Brix Andersen
aed0fbf774 drivers: can: remove initial bus-speed/bus-speed-data properties
Remove all CAN controller "bus-speed" and "bus-speed-data"
properties. These all use the default bitrates set via Kconfig.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-05-16 09:23:59 +02:00
Sylvio Alves
4a4d7584ff boards: rename and update esp32 related conf and overlay files
There are several esp32-based boards that its conf and overlay
files are missing proper renaming to match cpu cluster.

This also removes all _SOC_ name from files.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-04-23 15:36:13 +02:00
Renamed from boards/espressif/esp32s3_devkitm/esp32s3_devkitm_esp32s3_procpu.dts (Browse further)