Commit graph

40 commits

Author SHA1 Message Date
Brian Juel Folkmann
8b6382e68d drivers: flash: stm32 ospi: jedec_id read wrongly
Manufacturer id is skipped when reading jedec_id, due to wrong
address mode.
Before: flash_stm32_ospi: Jedec ID = [60 20 00]
After:  flash_stm32_ospi: Jedec ID = [ef 60 20]

Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
2023-09-12 16:29:47 +02:00
Dominik Ermel
d647a85fb5 drivers/flash/stm32/Xspi: Fix llvm compilation error
Fix compilation error on variable used for size of array in
OSPI and QSPI drivers.

Fixes #61804

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2023-08-30 10:18:57 +02:00
Daniel Leung
efe27f577a flash: rename shadow variables
Renames shadow variables found by -Wshadow.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-08-10 08:14:12 +00:00
Georgij Cernysiov
f09e3abbcb drivers: flash: stm32 ospi: configure ospim io ports
Allows to configure OSPI Manager IO ports with devicetree.

If properties are absent, then original default values
are preserved for compatibility.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-06-21 16:06:00 +02:00
Georgij Cernysiov
0ea2e7c906 drivers: flash: stm32 ospi: move STM32 OSPI node
Move `STM32_OSPI_NODE` to the top.
That allows its usage in other macros that require
OSPI bus.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-06-21 16:06:00 +02:00
Georgij Cernysiov
6bb603f4ee drivers: flash: stm32 ospi add ssht property
Allows to enable Sample Shifting Half-Cycle.

It is recommended to be enabled for STR mode.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-05-11 07:36:11 -05:00
Francois Ramu
609bb002e6 drivers: flash: stm32 ospi flash driver waits for full chip erase
Add a function to wait for the full (bulk) Nor-octoflah erase command.
When erasing the full octo-flash, the drivers waits until
the operation is ready and the external NOR mem becomes ready itself.
The full (bulk) erase operation lasts for several seconds.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-05-10 16:50:22 +09:00
Cyril Fougeray
1be72d9888 dma: callback with 2 status codes for successful transfers
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-05-08 09:57:32 +02:00
Georgij Cernysiov
091f425cd1 drivers: flash: stm32 ospi: fix jedec id read
Flash not in OPI mode doesn't require extra
dummy cycles.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-05-05 11:26:21 +02:00
Brian Juel Folkmann
7abcfc4e4c drivers: flash: bug fix select correct erase address mode
SPI / QSPI flash with density above 16MB must use 4 byte addressing mode
also on sector erase.

This patch selects the right addressing mode and opcode when 4 byte
addressing mode is selected

Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
2023-05-02 09:37:29 -05:00
Georgij Cernysiov
57cf528418 drivers: flash: fix stm32 ospi prescaler
Original computation seems to be based on
QSPI that has prescaler range [0, 255].
However, OSPI clock prescaler has different
value range [1, 256].

Adapt prescaler computation to valid OSPI
domain and add min value assert.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-04-25 12:21:59 +02:00
Francois Ramu
89636416b5 drivers: flash: stm32 ospi driver defines the dlyb-bypassed property
The delayblock is bypassed when the <dlyb-bypass> property is true.
DT_NODE_HAS_PROP tests whether the property is defined at all,
not whether a boolean property is true or false.
To get a boolean property’s truth value,
use DT_PROP(node_id, prop) instead.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-19 17:13:07 +02:00
Georgij Cernysiov
44e4b077ad drivers: flash: stm32 ospi add dlyb bypass prop
Allows to bypass delay block (DLYB).

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-04-13 12:15:13 +02:00
Francois Ramu
10e296f3f1 drivers: flash: stm32 ospi driver for the stm32h5x
With the stm32h5x, hal driver is xspi for octospi
Add a header file to map functions and constants.
The ospi driver of the stm32H5x serie does not support DMA yet.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-07 08:33:51 +00:00
Brian Juel Folkmann
8d11d183f6 drivers: flash: bug fix stm32 ospi flash erase
This commit fixes a bug in the STM32 ospi flash driver when attempting
to erase an area that spans more than one erase sector.
Without this fix, only the first sector is actually erased, the rest
silently fails the erase.
Issue is that the write enable latch command is only sent for the first
erase command.

Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
2023-01-26 09:39:59 +00:00
Francois Ramu
4500dba078 drivers: flash: stm32 ospi driver correct device size
The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
To get 64MBytes = 2^26, the value of the Init.DeviceSize must be 26.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-11 09:39:47 +01:00
Francois Ramu
2cca8b54a3 drivers: flash: stm32 ospi driver prepare sfdp command
Change the stm32_ospi_read_sfdp to have AddressSize
prepared in one single condition.
Add more debug msg.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-11 09:39:47 +01:00
Francois Ramu
acd582e456 drivers: flash: stm32 ospi flash driver for stm32l4plus mcus
Adaptation of the ospi nor flash driver for stm32l4 plus
where the peripheral is slighty different.
Configure the OSPIM peripheral for mcu embeddingthis peripheral
in front their octospi instances.
Add LOG for read access command like for write access.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-29 09:32:22 +00:00
Francois Ramu
0da1323b95 drivers: flash: stm32 ospi can read the SFDP table from the DTS
When the SFDP table is provided by the DeviceTree with sfdp-bfp property
It is NOT read from the octoFlash.
If no table exists in the DTS and flash read SPDP fails,
the device init fails.
Availability of this sfdp_read API is conditional
on selecting CONFIG_FLASH_JESD216_API.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-22 14:26:57 +00:00
Francois Ramu
6143579c85 drivers: flash: stm32 ospi driver with read ID from octoflash
This commit adds the jedec216 read JEDEC ID function API.
The ospi commands are issued to the octo flash device or
by the DTS jedec-id property.
Availability of this API is conditional
on selecting CONFIG_FLASH_JESD216_API.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-22 14:26:57 +00:00
Francois Ramu
9fbe27bc32 drivers: flash: ospi for stm32 mcu
Fixes command configuration to have samples/drivers/spi_flash
passed on stm32l562 and stm32u585 disco kits.
In OctoSPI STR/DTR and SPI/STR modes,
to determine the address_width, checking the jesd216_bfp_addrbytes
on JESD216_SFDP_BFP_DW1_ADDRBYTES_VAL_3B4B or _VAL_4B.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-22 14:26:57 +00:00
Francois Ramu
e24c5256ba drivers: flash: stm32 octospi NOR flash with DMA on stm32u5x
This commit set the stm32 octospi drivers for the stm32u5x
when DMA (GPDMA) is transferring.
Valid for octospi1 or octospi2.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-22 12:00:00 +00:00
Guillaume Gautier
2604951989 drivers: flash: Use dts to configure STM32 OSPI manager clock
Instead of calling __HAL_RCC_OSPIM_CLK_ENABLE() to enable the OSPI
manager clock, we now use a new clock binding in the dts.

In order to avoid confusion between the different clocks, the driver
is modified to select the clock based on their names instead of indexes.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2022-11-10 11:28:18 +00:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Guillaume Gautier
aba432348b drivers: Cleans variable scopes for STM32 drivers
Fix the scope of some variables in various STM32 drivers including:
 - SDMMC
 - DMA
 - OSPI/QSPI Flash
 - Interrupt controller

The variables are set static instead of global and const if appropriate.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2022-10-12 18:41:48 +02:00
Francois Ramu
b6ee1dfe6e drivers: flash: octo spi for stm32 with DMA
Introducing the dma transfer (also through dmamux)
to transfer data to/from the NOR octo-flash
With a DMAMUX, the DMA channel is given by the DTS.
Note that STM32U5X does not support DMA here.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-08 10:07:21 +00:00
Erwan Gouriou
54302ac67d drivers: flash: stm32 ospi: Limit bytes read from DT SFDP table
In case SFDP table is provided via device tree, take care not reading
more than expected by the function caller as the result is written
in a structure which size is predefined by one specific byte in the
table, and could be smaller than the table size.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-05 10:17:21 +02:00
Francois Ramu
f106465741 drivers: flash: ospi driver erase command on 24bits in SPI mode
When configuring the octo-flash in SPI/STR mode, the address size
must be on 24bits (and not on 32bits).
Despite the dev_data->address_width which is always seen as 4, the
erase command must reduce the AddressSize for this transfer mode.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-08-25 21:05:27 +00:00
Henrik Brix Andersen
c1a35b7b39 drivers: flash: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
Francois Ramu
0852cf9eee drivers: flash: ospi for stm32 mcu
Fixes command configuration to have samples/drivers/spi_flash
passed on stm32l562 and stm32u585 disco kits.
In OctoSPI STR/DTR and SPI/STR modes

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-08-09 15:59:18 +01:00
Erwan Gouriou
1ef9e9eb9b include: drivers: stm32 clock_control: Replace OPT by DOMAIN
In the continuation of the previous commit, replace _OPT_ by _DOMAIN_
in macros relating to this feature.
hen, adapt drivers and tests to this new wording.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-08-08 14:17:07 +02:00
Francois Ramu
b165f10795 drivers: flash: octospi drivers for stm32h7 serie
With the introduction of the OSPI NOR flash controller
the stm32H7 serie requires the HAL MDMA in anycase.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-07-27 18:46:25 +02:00
Francois Ramu
764dbbf355 drivers: flash: stm32 ospi driver configures peripheral clock
The clock of the octospi peripheral is directly defined
by the DTS and configured by the clock_control_on function.
No specific stm32cube function is required then.
The clock control is taking this clock source to calculate
the clock rate.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-07-04 15:18:50 +02:00
Francois Ramu
80dd57a49d drivers: flash: stm32 ospi driver align erase on sector size
When erasing the flash, the size to erase must be
compared to a multiple of SECTOR_SIZE.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-06-29 10:30:04 +02:00
Georgij Cernysiov
bf974902bf drivers: flash: stm32: ospi: writing single, dual and quad modes
Support writing to NOR-Flash over OSPI using
the following modes:

* 1-1-1
* 1-1-4
* 1-4-4

Supports 4-Byte opcodes conversion for write opcodes.

Allows users to set what write/program opcode is used
in the DTS (not for OPI mode).
Will use some default PP opcodes based on the mode.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-06-16 10:29:15 +02:00
Georgij Cernysiov
f278db7071 drivers: flash: stm32: ospi: support SFDP quad enable requirements
Adds support for `quad enable requirements` DTS property.

Parses SFDP:BFP DW15 (QER related) and uses it (if available),
it bypasses the DTS property.

Automatically enables quad mode (if required).

Supports every DW15 QER modes.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-06-16 10:29:15 +02:00
Georgij Cernysiov
871ded0e65 drivers: flash: stm32: ospi: read/erase single, dual and quad modes
Adds support to read and erase NOR-Flash over OSPI using
the following modes:

* 1-1-2
* 1-2-2
* 1-1-4
* 1-4-4

Supports 4-Byte opcodes conversion and gets address width
from the SFDP:BFP.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-06-16 10:29:15 +02:00
Georgij Cernysiov
e8dece902f drivers: flash: stm32_ospi: fix includes
Adds `zephyr/...` prefix to `toolchain.h` include.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-25 11:13:40 +09:00
Francois Ramu
084dc3f0dd drivers: flash: ospi factorized for stm32 devices
Simplifies the driver and Gives a generic function to prepare the Regular
commands for each instruction.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-05-12 14:56:25 -05:00
Francois Ramu
16754378fb drivers: flash : introduce a new driver for the OCTOSPI
This is the stm32 octospi driver based on the exisitng quadspi
 for stm32 devices and source code from the STM32Cube.
This drivers initialized the peripheral and the NOR memory
in SPI or OctoSPI mode with STR or DTR data Transfer rates.
The NOR-flash can provide the SDFP table directly (if supported)
or through the DeviceTree.
 Limitation: no DMA transfer.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-05-12 14:56:25 -05:00