Make the i2c_transfer() to transact messages through the I2C bus.
It is useful for I2C storage devices, as now we can send one message
containing the destination byte/block address, then send the data
in another message. There is no need to construct one continuous
data buffer to send both address and data anymore.
The drivers and sample apps have been updated to utilize updated
API when appropriate. For i2c_dw, only master mode has been updated.
Slave mode will be updated once we can adequately test it.
Change-Id: I0a811d60567367817fcc8d15f5454e5c933722e2
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fixes a build issue when CONFIG_I2C_DEBUG is turned on.
Change-Id: I8df72e41d0809f99c9c3855cbfcbc5abc60cbca1
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are a few bits missing on enabling I2C controller on
quark_d2000_crb. This adds the missing bits.
Change-Id: I05bbe8367a9e69962db573d496f1f9f0167ba597
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch introduces the infrastructure required to enable QMSI drivers.
QMSI drivers are shim drivers based on drivers provided by QMSI BSP. The
BSP provides a static library (libqmsi) which implements several drivers
for peripherals from Intel MCUs.
Next patch will introduce the first QMSI driver (watchdog driver) which
will rely on the infrastructure introduced by this patch.
Change-Id: Ic7da5d0249af0629eef8c91d124a153f84d4a76e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
These symbols have the same name as the symbols from lib QMSI, which
causes a compilation failure, when lib QMSI is used.
This replaces the offending symbols with names which are more consistent
with the rest of the file (rtc_ prefix).
Change-Id: I288a1a229bf0b40f3b6fc8ffb35c502f998054b8
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Simplifies the nanokernel timer API so that the timeout parameter must be
specified when invoking nano_isr_timer_test(), nano_fiber_timer_test(),
nano_task_timer_test() and nano_timer_test().
This obsoletes the following APIs:
nano_fiber_timer_wait()
nano_task_timer_wait()
nano_timer_wait()
Note that even the though the new API requires that the timeout parameter
be specified, there are currentl only two acceptable values:
TICKS_NONE and TICKS_UNLIMITED
Theoretically, the current implementation would allow one to supply a
finite positive value for the timeout and the system would wait up to
that many ticks for the timer to expire. However, it is thought that
that unnecessarily complicates the nanokernel timer model and so it is
left as an unsupported option. Should that change, then that feature
could be enabled by updating the documentation.
Change-Id: I8835c5342ab5025d6f70fdfbed54a50add7568d7
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Changes the nanokernel semaphore API so that the timeout parameter must be
specified when invoking nano_isr_sem_take(), nano_fiber_sem_take(),
nano_task_sem_take() and nano_sem_take().
This obsoletes the following APIs:
nano_fiber_sem_take_wait()
nano_fiber_sem_take_wait_timeout()
nano_task_sem_take_wait()
nano_task_sem_take_wait_timeout()
nano_sem_take_wait()
nano_sem_take_wait_timeout()
Change-Id: If7a4bce1bd8ec8d6410d04f3c16ff1922ff0910e
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Changes the nanokernel FIFO API so that the timeout parameter must be
specified when invoking nano_isr_fifo_get(), nano_fiber_fifo_get(),
nano_task_fifo_get() and nano_fifo_get().
This obsoletes the following APIs:
nano_fiber_fifo_get_wait()
nano_fiber_fifo_get_wait_timeout()
nano_task_fifo_get_wait()
nano_task_fifo_get_wait_timeout()
nano_fifo_get_wait()
nano_fifo_get_wait_timeout()
Change-Id: Icbd2909292f1ced0bad8a70a075478536a141ef2
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
If the remote handler tries to send a message back with wait enabled
it can lead to a deadlock.
Change-Id: Ife6eae29c10e8937abd1b6511ee605f7786c6a7a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The while loop on the status bit was unnecessary as we will get
a separate invocation of the ISR for every message. We also ensure
that the global status register bits for the channel being serviced
are cleared before exiting. Fixes an issue where some messages
would be dropped or repeated.
Some runtime checks that shouldn't happen in practice have been moved
to assertions.
Change-Id: Iedd28ae15522c7b9f59ef34fa9fa8b4e24e6be14
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
It's unclear why the carriage returns were moved to the begnning and
not the end.
Change-Id: Ic6bda55c7537538c47477e6c44f5e4c1534573d4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This implements the newly introduced APIs to manipulate line controls
for UART.
This also implements the driver command API as setting baud rate
may require setting the DLF.
Change-Id: I80634aa3fbd4a3223c46edb61417123e36f439dd
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds 2 new APIs to the serial/uart drivers:
() One is to control the serial line, such as RTS and CTS.
() Another one is to allow driver to expose hardware specific functions
to apps. This is needed as some hardware may have extra registers to
set for baud rate.
To keep the code size small, these features are disabled by default.
Change-Id: I15c000ce68a0a490dcfd3493b2fe9bc51fa974fa
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This moves the baud rate and options fields out of the UART driver
config struct and into the driver data struct. This will allow
changing baud rate and options at runtime in the future.
Change-Id: I62ddea2f95e634f2d60eeb9537f960799fc9301f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The UART on Quark SE and D2000 supports fractional clock divider.
It is used to limit frequency error for supported baud rates.
Change-Id: I1f39a95db09f4a5a4116edc700a10e4b9ecfa2bd
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Change-Id: Id2ee328458c5a1be944e90c34bbc2158464be325
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Rename class in pci_dev_info struct to allow to use C++ compilers.
Updated drivers to use new struct.
Change-Id: I17b94cb7bc094bccd615c8389a28589bfa90cab8
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Even though the OS is 32-bit, 64-bit BARs can still be mapped into
32-bit address space.
64-bit BARs occupy two entries instead of one, so the offset of a BAR
isn't necessarily its index multiplied by 4. To cope with that, hold an
extra offset field in the lookup structure.
Only 3 bits are required for index as well as the offset since the there
are up to 6 BARs.
Change-Id: I0d4955a3aca70b7fc81a1df06ab5f9f45793c70f
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
The PCI device information for both i2c ports is missing, resulting in
broken PCI enumeration.
Fix this by adding the missing PCI device information.
Change-Id: I5d1739cc994491c34a2a938166a9e56a082ed32e
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
The current scan loop does not re-initialize the device number, so only
the first bus is scanned.
Change-Id: I9dc97cecd5652c353b09ab5692f59f562436f902
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
Only the first port is currently enumerated on the PCI bus. As a result,
the second port configuration will be set based on the default options,
that may be invalid on some platforms.
Fix this by enumerating the second port as well.
Change-Id: I63733a1f13f7cb35cae1dba3b6192dcd61c9f644
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
ADC allows to program repetitives sampling after a read request.
User should be able to provide buffers for each table entry that can
hold subsequente repetitive samples.
Change-Id: I75da4a480a0e3f241d9276cf4fe3999a9cfbba2c
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Buffer management on dw driver was too complex.
New buffer management follows the following behavior.
- Each sequence entry have one sample at a time.
- Each sequence entry have a buffer to store that sample.
- If ADC have repetitive sampling configuration, the buffer value
is overwritten with the new value.
New buffer management allow us to remove Synposys'
files and license headers as well.
Change-Id: I75bbbee59bea400839bb34ca1fcb2111073f99d0
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Fixes interruption connection parameters, ISR parameter is not null anymore.
Removes irq_connect call that is a dynamic irq api that should not be
used along static irq api: IRQ_CONNECT_STATIC and IRQ_CONFIG.
Change-Id: I232c8562d2dcda3229776b561e2c1f4608a31cdd
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
The current gpio_dw_initialize implementation masks the interruptions in the line
dw_write(base_addr, INTMASK, ~(0)) to assign api functions and initialize
interrupt vectors and handlers safely. Immediately after this, the driver expects
that gpio_dw_unmask_int(port) unmasks the interrupts. Without this patch that
implementation is empty for the quark se ss board.
Change-Id: Iac84c8807fcadad8c256c3fcaa4ff624b6337bf3
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Use a default priority to avoid Kconfig blocking when priority
is not set in SoC or Board.
Change-Id: I4edda47b955a7ee834f04dc40d0decbd8dee6305
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds a driver to utilize the DesignWare timer IP block
to do PWM.
Change-Id: I11ba689350b664209ad2440e3001e57eb38fd982
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.
Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use a real board name that can run this kernel instead of a generic
name. Basic functionality exits on this board with Zephyr.
Setup of the board is mostly similar to what we have in galileo (EFI
based)
Change-Id: Ic8554f26dcac0dbbbb6d35d863482f6207dc63c5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Galileo board is based on the X1000 SoC, so move galileo to
boards and create this SoC instead, inheriting all SoC related code
and configuration items.
Change-Id: I9b39f1b44644775ee48acae284b82bae7876fffb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Using number_removed to find out how many packets from unack queue we
need to clear.
Change-Id: Icad948892f3ab1febc939e9ba6d6b3431973633e
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
We might get out of sync packet because of race collision, drop it.
Change-Id: Ic84a760199df1520dc7a95383972f9ec428c7fde
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Analyze stack when sending single ACK packet.
Change-Id: Ifd3a54f0d1ad9a644363563fa9b8bea05b895fa9
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
