Added GPIOTE0, GPIOTE1 instances for legacy devices,
GPIOTE20, GPIOTE30 for Moonlight and GPIOTE130,
GPIOTE131 instances for Haltium.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Different nRF52 devices have different maximum TWI DMA transfer size,
and it's easy to hit the limit with i2c displays on nrf52832 (8 bit) and
nrf52810 (10 bit). Currently neither the driver or the hal validate the
limit, leading to random NACK errors when trying to transfer more data.
Add a check on the driver to fail gracefully when going over the limit.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Since the pwm_nrf_sw driver can now be used on all nRF SoCs, add its
corresponding DT node in the common file included by all those SoCs.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Adds address cells of size 1 and size cells of size 1 to GPREGRET
instances for Nordic devices.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
The number of available EasyDMA MAXCNT bits is now defined per-instance
in Devicetree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Modifying counter drivers (rtc and timer) to rely completely on
device tree and not on Kconfig of MDK flags.
Adapting dtsi for all SoCs and adapting test configuration.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Adds a driver for the Nordic nRF GPREGRET registers and adds
entries to the SoCs for this peripheral.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Devicetree is the natural place to describe hardware, so move the
maximum frequency the SPI can work with to Devicetree instead of relying
on values from HAL.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This is a follow-up to commit 586e26e8fc.
Add missing `qdec0` node labels in definitions of SoCs that have only
one QDEC instance so that the `HAS_HW_NRF_QDEC0` option is properly set
for them. Use the same pattern as in the WDT case and keep the existing
`qdec` labels for backward compatibility.
Also update validation of base addresses so that both QDEC0/QDEC and
QDEC1 are checked.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
... to align with what is used in most other PWM bindings.
Update PWM nodes in SoC .dtsi files accordingly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-sw-pwm" binding
and with related `DT_PWMS_*` macros.
The change described above requires also providing a way to specify
SoC pins that are to be assigned to the PWM channels. Hence, the commit
introduces in the "nordic,nrf-sw-pwm" binding the `channel-gpios`
property that replaces the `channel-count` one.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add boolean properties to the binding for the nRF RADIO peripheral
to indicate whether the following features are supported:
- IEEE 802.15.4 mode
- 2 Mbps BLE mode
- coded BLE PHY
- high TX power settings
Set these properties appropriately in devicetree radio nodes for all
nRF SoCs.
Add also such properties and set them in appropriate nodes for nRF
flash controllers to indicate whether they support partial erase.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
For consistency with the scheme used for other nRF peripherals,
use the peripheral name that nRF Product Specifications use.
In this case, it is WDT, not WATCHDOG.
Also remove the requirement for the label property in the binding.
It is no longer needed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add missing devicetree nodes representing the following peripherals
in nRF SoCs:
- ACL
- BPROT
- CCM
- COMP/LPCOMP
- CTRLAP
- DCNF
- MPU (nRF MPU peripheral in nRF51 Series, not ARM MPU)
- MUTEX
- MWU
- NFCT
- OSCILLATORS
- POWER (in nRF51 and nRF52 Series)
- PPI
- RESET
- SWI
- USBREG
Add also corresponding bindings and validation of base addresses of
these nodes.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
As Nordic SPI, I2C and UART buses can act as both slave and master,
these nodes can have different compatible properties, and are annotated
with a comment, instead of a compatible property. This forces boards to
put compatible properties in their definitions, which is unnecessary
boilerplate for most boards, as most boards acts as masters on these
buses.
Set master mode by default for these buses, to reduce boilerplate and
potential errors in board definitions. Boards that need to act as slave
nodes will just continue to override the compatible properties.
Likewise, existing boards that override this compatible property with a
master binding will not be affected by this change.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Use nrfx_gpiote and nrfx_ppi allocators to allocate channels
at runtime instead of fixed, device-tree based allocation which
is harder to maintain.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add missing FICR, UICR, RADIO, and EGU nodes. We already have
compatibles for these defined, and the peripherals are present, so
define them for consistency across SoCs.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This property is required information for extracting PSEL bits relevant
to peripheral pinmux from this node.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Add binding for the Nordic ECB (AES electronic codebook mode
encryption) peripheral and corresponding devicetree nodes for
nRF SoCs that feature this peripheral.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Since MDK was updated and now it contains the definition of QDEC
peripheral for nRF52805, the DT node representing this peripheral
can be processed normally.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Instead of hard-coded values for interrupt priorities in DT nodes, use
a macro that additionally can be overridden at the board or application
level. This allows, for instance, changing the interrupt priorities for
all but one peripheral without using a lengthy overlay file.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This file originally added a "nordic,nrf-sw-pwm" node with a few basic
properties that were common to all nRF51 and nRF52 series SoCs. There
is no implementation of SW_PWM available for other nRF series. At the
time this file has been created, there was only nRF91 apart from nRF5x,
but when nRF53 appeared, the name of this file became misleading.
Recent addition of common disabling of the systick node made it clear
that such common file for all nRF SoCs is convenient.
To prevent further confusion, rename this file to nrf_common.dtsi and
keep there only stuff actually common to all nRF series, moving the
SW_PWM related node to particular SoCs that use it (this is actually
consistent with how all other nodes, that also have some properties
common to several or even all nRF SoCs, are defined).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use PPIs 0-5 consistently across nRF51x and nRF52x for SW
PWM driver. Bluetooth LE controller's use of PPI has been
adjusted to use PPI 6-19 based on features enabled.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
So far 'timer-instance' DT property was the way to configure TIMER which
was used for generating PWM signal. Replace that by using 'generator'
phandle, so we get prepared for supporting RTC instances as PWM signal
generator.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
The number of capture/compare registers available on a peripheral
should be exposed in devicetree.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
