Commit graph

12 commits

Author SHA1 Message Date
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Anas Nashif
ede94516b0 drivers: intc_dw_ace: rename file
No need for the version in the file name, this will be used by multiple
versions of ACE.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif
0869e62539 intel_adsp: cleanup ace_v1x-regs.h more and prep for removal
File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif
52297422fc timer: intel_adsp: use DTS for hardware information
Convert timer driver to use a light weight syscon and DTS and convert
register information to use offsets and sys_read/sys_write instead of
structs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif
059dc41cc6 intel_adsp: put interrupt defines in own headers/cleanup namespace
Cleanup soc.h and move interrupt defines into own headers. Rename some
of the defines for ACE to have a unified namespace.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif
100090832d drivers: intc: ace: use DW structure already defined in the driver
The DW register block was duplicated into the ACE header while we had
the same thing in the driver. Move everything to the driver as the first
step with further improvements planned on top of this.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Peter Mitsis
d308ca5695 drivers: timer: adsp: Improve elapsed ticks calculations
It is better to use 64-bit variable types for calculating the number
of elapsed ticks than 32-bit variable types. This guards against the
propagation of calculation errors should the lower 32-bits of the timer
counter roll over multiple times before the timer ISR is serviced.

(Such a scenario can easily occur when pausing the system for an
extended period of time with a debugging device such as a Lauterbach.)

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2022-10-07 18:34:50 -04:00
Flavio Ceolin
45465708f0 soc: intel_adsp: Add ACE soc series
ACE15_MTPM is one SOC from the ACE series. Organize
it following cavs pattern.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-09-09 16:03:59 -04:00
Anas Nashif
728d8eb2c0 intel_adsp: rename clock registers due to possible conflict
SOF using the same defines and in some cases generating conflicts.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-28 14:11:23 -04:00
Anas Nashif
2af59e7d44 intel_adsp: unify timer registers and simplify timer driver
Declare clock control in the shim header per SoC and remove ifdeffry
from the driver simplifiying it and making it ready for the next
platform.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-21 17:55:41 -04:00
Anas Nashif
423264b96b intel_adsp: make shim header soc specific
using once single header to support multiple socs and product
generations is error prone and not easily maintained.

Over time we have been adding conditional code in headers and extending
structs  to support new HW features which becomes a problem.

Goal is to keep platform headers in sync with hardware specification and
allow of introduction of new platforms and hardware features by just
introducing a new SoC with its own set of headers.

This is now just a copy of existing cavs-shim.h with slight changes,
goal is to clean this up long term and sync with hardware datasheets and
align on naming as well.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-21 17:55:41 -04:00
Flavio Ceolin
e4a3e2d8b6 intel_adsp: Unify cavs and ace timers
These two timers were sharing pretty much the same code. Actually
mtl timer was a "superset" of cavs timer. Just merge them into a
single one called intel audio dsp timer (intel_adsp_timer).

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-06 15:11:07 -04:00
Renamed from drivers/timer/ace_v1x_timer.c (Browse further)