Commit graph

19 commits

Author SHA1 Message Date
David Ullmann
bcc7499684 drivers: rt6xx ctimer pwm driver
using ctimer to implement pwm api
Signed-off-by: David Ullmann <davidu@meta.com>
2023-08-03 12:39:06 -04:00
Gerard Marull-Paretas
1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Daniel DeGrasse
d8b8566daf drivers: clock_control: add clock rate definitions for MIPI and LCDIF
Add clock rate definitions for MIPI and LCDIF peripherals, to enable
retrival of these peripheral clock rates at runtime.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-03-04 09:19:26 +01:00
Gerard Marull-Paretas
140f014bed drivers: clock_control: mcux_syscon: fix define collision
mcux HAL pollutes namespace with stuff like ARRAY_SIZE, MIN, MAX, etc.
Luckily it only defines them if not already defined, so we can play with
include order to "fix" the problem. Move the infamous soc.h (which
includes HAL) after other Zephyr includes.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Daniel Leung
3e8f97009d i3c: add I3C controller driver for MCUX
This adds a very basic driver to utilize the I3C IP block
on MCUX (e.g. RT685). Note that, for now, this only supports
being the active controller on the bus.

Origin: NXP MCUXpresso SDK
License: BSD 3-Clause
URL: https://github.com/zephyrproject-rtos/hal_nxp
Commit: 2302a1e94f5bc00ce59db4e249b688ad2e959f58
Purpose: Enabling the I3C controller on RT685.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-09-09 17:42:33 -04:00
Daniel DeGrasse
04773864a8 drivers: sdhc: add SD host controller driver for LPC SDIF
add SD host controller driver for LPC SDIF IP block, using NXP SDIF
HAL driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-09-08 10:06:28 +02:00
Declan Snyder
84f3a0a8c6 drivers: Fixes MCUX clock assignment
In clock_control_mcux_syscon.c,
add a break statement.

Fixes #48367

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2022-08-17 17:53:06 -05:00
Chay Guo
b47a8a428f drivers: clock_control: mcux_lpc_syscon_clock: Add flexcomm16 suppport
Added FlexCOMM16(HS SPI1) clock for MIMXRT5xx.

Signed-off-by: Chay Guo <changyi.guo@nxp.com>
2022-06-13 12:10:57 +02:00
Gerard Marull-Paretas
fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Navin Sankar Velliangiri
b69dadb6e5 drivers: clock_control: lpc: syscon: Add BUSCLK support
Add support for the LPC BUS clock to the LPC SYSCON clock controller
driver.

Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
2022-03-24 10:44:27 +01:00
Mahesh Mahadevan
aeabe6c70c driver: clock: Update MCUX Syscon clock control driver
1. Update to add support for Flexcomm8-13.
2. Fix the clock control driver, the enclosing #define
   was incorrect.
3. Identify HS_SPI port using the appropriate Register
   define

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-01-19 13:35:09 -06:00
Henrik Brix Andersen
abaf7cc70d drivers: clock_control: lpc: syscon: add MCAN clock support
Add support for the LPC MCAN clock to the LPC SYSCON clock controller
driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-01-10 12:00:20 +01:00
Daniel DeGrasse
b18aefdfd3 dts: rt685: enabled flexcomm15
the RT685 contains an additional flexcomm peripheral, that supports
only I2C. This commit adds this peripheral to the device tree,
and enables pins and clocks for flexcomm15.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2021-12-08 08:27:44 -05:00
Maureen Helm
ed9cb841c3 drivers: clock_control: Refactor drivers to use shared init priority
Refactors all of the clock control drivers to use a shared driver class
initialization priority configuration,
CONFIG_CLOCK_CONTROL_INIT_PRIORITY, to allow configuring clock control
drivers separately from other devices. This is similar to other driver
classes like I2C and SPI.

Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_OBJECTS or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.

The even lower defaults for STM32 and Arm Beetle are preserved by
SoC-family level overrides.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-10-19 23:05:25 -04:00
Toby Firth
893bfc0fc1 drivers: counter: added ctimer driver for lpcexpresso55s69
Added shim driver for the CTIMERs for the lpcexpresso55s69 board.

Fixes: #22705

Signed-off-by: Toby Firth <tobyjfirth@gmail.com>
2021-08-24 17:13:22 -04:00
Mahesh Mahadevan
f28672a448 drivers: clock_control: Update LPC clock driver for USDHC
Add support to get USDHC clock frequency

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-08-17 17:53:31 -04:00
Gerard Marull-Paretas
62afdca908 drivers: clock_control: remove usage of device_pm_control_nop
device_pm_control_nop is now deprecated in favour of NULL.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-28 10:54:58 -04:00
Kumar Gala
57a402cd0a drivers: clock_control: Convert drivers to new DT device macros
Convert clock_control drivers from:

    DEVICE_AND_API_INIT -> DEVICE_DT{_INST}_DEFINE

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-12-16 15:23:39 -06:00
Mahesh Mahadevan
c7b0b43ec6 drivers: Add NXP LPC clock control driver
Add clock control driver for NXP LPC devices that use
the MCUX SDK drivers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-10-15 11:17:24 -05:00