Commit graph

53975 commits

Author SHA1 Message Date
Dan Kalowsky
c0811e9951 subsys/cpp: update tag for C++2a to C++20
C++20 was tagged and released in December of 2020.  It is no longer
forth coming.

Signed-off-by: Dan Kalowsky <dkalowsky@amperecomputing.com>
2021-07-13 09:40:51 -04:00
Krzysztof Chruscinski
28be4ba91d logging: log_backend_net: Add support for logging v2
Added support for logging v2 backend API in net backend.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-07-13 09:39:28 -04:00
Thomas Stranger
26946874c1 boards: nucleo_wl55jc enable rng
This commit enables entropy support for nucleo_wl55jc.
Additionally it sets the PLL Q divider to 2, which was not set in
the board dts before.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:48 -04:00
Thomas Stranger
363fda31fe dts: stm32wl: add definitions for rng peripheral
This commit adds the dt node for rng to the stm32wl series
and sets it as chosen zephyr,entropy source.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:48 -04:00
Thomas Stranger
63478aba48 soc/arm: add support for stm32g0 socs with (hw aes and) rng support
This commit introduces g041, g061, g081, and g0c1 socs in kconfig.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:48 -04:00
Thomas Stranger
4f6e809be4 dts: stm32g0: add definitions for socs with rng (and aes) support.
This commit adds support for stm32g0 socs with integrated rng and hw aes
acceleratior, which are stm32g041, stm32g061, stm32g081, and stm32g0c1.

It also adds the definitions for the rng peripheral
and sets it as chosen zephyr,entropy source.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:48 -04:00
Thomas Stranger
a587c25156 drivers: entropy: add support for stm32wl and stm32g0
This commit adds entropy support for stm32wl and stm32g0.

Pll is used as clock source and has to be enabled,
other clock sources are not supported at the moment.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:48 -04:00
Thomas Stranger
808cc68e4c boards: add seeed studio LoRa-E5 Dev board
This commit adds support for the seeed studio LoRa-E5 Dev board,
which is powered by a module based on stm32wle5jc soc.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:29 -04:00
Thomas Stranger
15d8f1ea18 dts: arm: introduce seeed lora-e5 module
This commit adds the dts definitons for the seeed lora-e5 module.
Additionally I add myself as codeowner for the new dts/arm/seeed
directory.

This module packages a stm32wle5jc Sub-GHz Wireless Soc,
together with a 32MHz TCXO, a 32.768KHz crystal oscillator, and
power and RF circuitry.

With the introduction of lora support definitions for the radio
will be added in a future commit.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:29 -04:00
Thomas Stranger
7422ce6265 drivers/clock_control: stm32wl set cpu2 prescaler only for STM32WL5X
To support single core stm32wlex series, cpu2 prescaler is set
only on dual core soc variants.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:29 -04:00
Thomas Stranger
e804f5a5c6 soc/arm: add support for additonal stm32wl socs
This commit adds support for stm32wle4xx, stm32wle5xx single core socs,
as well as stm32wl54 dual core soc.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:29 -04:00
Thomas Stranger
f05a6ba7f5 dts: stm32wl: add definitions for further stm32wl socs.
This commit adds dt support for stm32wle4, and stm32wle5 single core,
as well as stm32wl54 dual core socs.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-13 09:37:29 -04:00
Gerard Marull-Paretas
26ad8376bd pm: remove callback from control function
The callback is not used anymore, so just delete it from the pm_control
callback signature.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-13 09:36:45 -04:00
Gerard Marull-Paretas
217e610d8f pm: remove redundant callback usage
the device PM callback is not used anymore by the device PM subsystem,
so remove it from all drivers/tests using it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-13 09:36:45 -04:00
Gerard Marull-Paretas
a4f22b6235 pm: device: remove runtime PM callback
The callback used by the device runtime PM can be easily replaced by a
simple state set after calling the state set/get calls. Broadcast logic
is simplified too, leading to the same previous behavior.

Since this is the only place where this callback was used, it can now be
removed from all devices and so pm_control callback signature
simplified.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-13 09:36:45 -04:00
Mahesh Mahadevan
04ff3b34be boards: imxrt685: Update pinmux setting to remove the const keyword
This would save some space by using a local variable

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-07-13 09:36:19 -04:00
Maureen Helm
fbaaca188b soc: boards: Disable i.MX RT6xx boot header in chainloaded applications
The bootloader itself contains the i.MX RT6xx boot header, so we don't
need to duplicate it when building chainloaded applications.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-07-13 09:35:38 -04:00
Maureen Helm
eaacc8aa91 boards: arm: Add mcuboot flash partitions to mimxrt685_evk
Adds flash partitions and chosen nodes to the mimxrt685_evk device tree
to support mcuboot on the external octal SPI flash. This flash is rated
for 100K minimum program-erase cycles per sector, therefore this
partition configuration supports approximately 100K / (24576/8128) =
33073 upgrades.

Tested with samples/subsys/mgmt/mcumgr/smp_svr. The image swap takes
about a minute and a half to complete.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-07-13 09:35:38 -04:00
Maureen Helm
0082a1a6e5 soc: boards: arm: Refactor i.MX RT600 zephyr,flash usage
Refactors the i.MX RT600 SoC series to be more consistent with the i.MX
RT10xx SoC series by choosing a child node (external flash device) of
the FlexSPI bus for zephyr,flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-07-13 09:35:38 -04:00
Huifeng Zhang
0eab654b13 arch: arm64: select SCHED_IPI_SUPPORTED for Armv8_R
Armv8_R supports IPI

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2021-07-13 09:30:29 -04:00
Huifeng Zhang
7dd3456479 boards: arm64: add fvp_baser_aemv8r_smp
Support SMP for fvp_baser_aemv8r.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2021-07-13 09:30:29 -04:00
Huifeng Zhang
ab758046dd boards: arm64: fvp_baser_aemv8_r: change FVP startup parameters
Eliminate GICv3 warning messages printed by FVP_BaseR_AEMv8R.
And "cluster0.NUM_CORES" depends on CONFIG_MP_NUM_CPUS now.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2021-07-13 09:30:29 -04:00
Huifeng Zhang
a1f14419ee soc: arm64: arm: fvp_base_r: define a strong pm_cpu_on() function
With this patch, zephyr can enable SMP directly. Otherwise
zephyr needs TB-R to provide psci function.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2021-07-13 09:30:29 -04:00
Huifeng Zhang
7bf6d88029 driver: pm_cpu_ops: change PM_CPU_OPS_PSCI's dependency
Armv8-A and Armv8-R both support PSCI. So PM_CPU_OPS_PSCI's
dependency should be "ARM64" rather than "ARMV8-A".

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2021-07-13 09:30:29 -04:00
Huifeng Zhang
c34960bc87 arch: arm64: Unify the initialization of MMU and MPU
Because MMU and MPU should not be enabled together and they provide
the same functionalities.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2021-07-13 09:30:29 -04:00
Huifeng Zhang
b89c727c8e soc: arm64: arm: fvp_aemv8r: Init VMPIDR_EL2 in el2 plat init.
Add strong definition z_arm64_el2_plat_init() and it is controlled
by CONFIG_SOC_FVP_AEMV8R_EL2_INIT.

VMPIDR_EL2 must be set manually on EL2. The purpose of VMPIDR_EL2 is
that holds the value of the Virtualization Multiprocessor ID and This
is the value returned by EL1 reads of MPIDR_EL1

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2021-07-13 09:30:29 -04:00
Huifeng Zhang
7d3de0fca7 boards: arm64: fvp_baser_aemv8r: modifing dts for enabling SMP
Add psci and more cpu nodes into fvp_baser_aemv8r.dts. The purpose
of it is perparing to support SMP.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2021-07-13 09:30:29 -04:00
Huifeng Zhang
f738c15a93 boards: arm64: fvp_baser_aemv8r: select CACHE_MANAGEMENT
fvp_baser_aemv8r supports CACHE_MANAGEMENT too and CACHE_MANAGEMENT
should also be selected.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2021-07-13 09:30:29 -04:00
Kumar Gala
15edf55781 tests: test_build: Exclude some NS platforms from debug builds
The nrf9160dk_nrf9160_ns and nrf5340dk_nrf5340_cpuapp_ns don't have
enough space for debug builds as configured so excluded them from
this specific test.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-07-13 06:38:57 -05:00
Mark Wang
149d490b3f Bluetooth: SDP: judge the buf->len before sys_get_be16
There may be less than 2 bytes in buf before calling sys_get_be16.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2021-07-13 14:18:28 +03:00
Dominik Ermel
6617af02c4 subsys/mgmt/mcumgr: Add SMP Zephyr specific storage erase command
The commit adds support for Zephyr basic mgmt group to mcumgr.
The first command added to the group is storage erase command.

Authored-by: Sigvart Hovland <sigvart.hovland@nordicsemi.no>
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2021-07-13 11:56:39 +02:00
Aleksandr Khromykh
2f3a3e3b51 Bluetooth: Mesh: Tests of BLE Mesh beacon flags management
Tests check transmission, receiving beacons in situations
of IV update (with test mode on) and key refresh procedures.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2021-07-13 11:54:47 +03:00
Chih Hung Yu
a927ae39ed net: lib: sockets: Fix assertion failure when zsock_close()
When zsock_close() is called, socket is freed before the mutex for the
socket is unlocked. If the freed socket is given to another thread
immediately, the mutex for the socket will be initialized by the new
socket owner, while the mutex is still locked by the thread calling
zosck_close().

Fixes #36568

Signed-off-by: Chih Hung Yu <chyu313@gmail.com>
2021-07-12 20:16:37 -04:00
Chih Hung Yu
13b2e5bac4 net: ip: Fix assertion failure when tcp_send_data()
When tcp_send_data() is called to resend data, but there is no data
to resend, zero length packet is allocated and NULL net_buf is passed
to net_buf_frag_insert() in which assertion fails.

Fixes #36578

Signed-off-by: Chih Hung Yu <chyu313@gmail.com>
2021-07-12 20:08:01 -04:00
Torsten Rasmussen
ccdb3f89cc cmake: extended zephyr_library_amend description with an extra example
Add some more example to the description of zephyr_library_amend().
This should help users to get input of the extra possibilities that this
function provides.

See: #35770

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-07-12 20:07:16 -04:00
Johan Hedberg
b10287cd69 drivers: edac: Fix PCIe Kconfig dependency
It's not possible to build the IBECC driver without PCIe support.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2021-07-12 20:02:00 -04:00
David Palchak
043507dbd6 kernel: native_posix: Don't run global C++ constructors
On the native_posix board global object constructors
are run by the underlying OS runtime init prior to
Zephyr kernel init. Thus Zephyr should not run global
object constructors a second time. Doing so breaks
application behavior that relies on global
constructors doing work that must be done only once.
See bug #36858 for more information.

Signed-off-by: David Palchak <palchak@google.com>
2021-07-12 19:51:16 -04:00
Kumar Gala
c75f8335a8 ci: reduce disk usage for daily build
Avoid some cases of running out of disk space in the daily build.  Add
setting -M option to remove artifacts as we build.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-07-12 16:17:54 -05:00
Akash Patel
d3471872b1 boards: fixing typo from MX24R64 to MX25R64
Comments in .dts files with MX25R64 and QSPI contained a typo

Signed-off-by: Akash Patel <akash.patel@nordicsemi.no>
2021-07-12 16:07:08 -05:00
Crist Xu
5b44d5f721 driver: flexcan: flexcan support for the rt1170
add the flexcan3 support for the rt1170

Signed-off-by: Crist Xu <crist.xu@nxp.com>
2021-07-12 16:05:34 -05:00
Gerard Marull-Paretas
165ae60e40 drivers: pinmux: stm32: fix name clashes with G4 series
There is a name clash when using G4 series LL TIM driver depending on
the inclusion order of the LL TIM and pinmux headers. If the LL headers
are included after pinmux is included, AF1 and AF2 definitions used by
pinmux clash with the AF1 and AF2 TIMx register names.

In order to solve this problem with minimum impact, the following has
been done:

1. Prefix the AFx and ANALOG definitions with STM32
2. In order to avoid changing all *-pinctrl.dtsi files, the STM32_PINMUX
   macro contatenates STM32_ with the provided mode.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-07-12 16:03:18 -05:00
Lauren Murphy
ab2ede428a doc, cpp: Update CXX support to show exception support
Updates CXX support documentation to reflect exception support
added in fixes for #32448 and #35772.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2021-07-12 23:35:45 +03:00
Jun Lin
1974ea97a4 driver: clock: npcx: add a option to generate LFCLK via XTSOC
This commit adds a new Kconfig option CLOCK_CONTROL_NPCX_EXTERNAL_SRC.
With this option enabled, the internal 32.768 KHz clock (LFCLK) is
generated by the on-chip Crystal Oscillator (XTOSC). Otherwise, the
LFCLK is generated by the Low-Frequency Clock Generator (LFCG).

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2021-07-12 23:34:42 +03:00
Wealian Liao
bbd5b259e5 soc: npcx: Add soc log register
NPCX power.c use LOG_MODULE_DECLARE(soc), but NPCX chip doesn't
register soc log module. This CL register soc log in soc.c to fix NPCX
build error for power management & log system.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2021-07-12 22:49:18 +03:00
Vinayak Kariappa Chettimada
9bc9e15852 Bluetooth: Controller: Fix Periodic Sync setup with invalid channels
Fix Periodic Synchronization setup when handling invalid
number of channel count in Periodic Advertising's Sync Info
structure.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-07-12 17:23:51 +02:00
Marcin Niestroj
c28d372d33 drivers: pwm: nrf_sw: drop deprecated 'timer-instance' DT prop
This property has been marked as deprecated in 2.5.0 and was replaced by
'generator' property.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2021-07-12 08:20:47 -05:00
Marcin Niestroj
287b7c497f dts: bindings: jedec,jesd216: remove deprecated 'has-be32k' prop
This property has been marked as deprecated in 2.5.0 and was not
actually used for even longer time.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2021-07-12 08:19:52 -05:00
Mahesh Mahadevan
456ca4fff9 boards: mxrt685: Update to documentation
Move the I2S_DATAIN pin description so it is grouped with
I2S pins

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-07-12 08:09:16 -05:00
Vinayak Kariappa Chettimada
40374df24f Bluetooth: Controller: Use macros for SCA and Channel Map access
Use macros to access SCA and Channel Map fields in the Sync
Info structure in advertising PDUs.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-07-12 13:19:46 +02:00
Vinayak Kariappa Chettimada
71c6d11b08 Bluetooth: Controller: Minor fix debug message with channel map mask
Minor fix to channel map mask used in debug message to print
sync info fields.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-07-12 13:19:46 +02:00