Add support for USDHC0 controller on FRDM_MCXN947 board. This support
was verified using the `tests/subsys/sd/sdmmc` and
`tests/subsys/sd/sdio` testcases. Note that this board does not ship
with the SD header (J12) populated by default, so the user must populate
one.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The CSI can connect to either a camera sensor (as on i.MX RT10xx) or
a MIPI CSI-2 receiver (as on i.MX RT11xx). To be generic, change the
naming from sensor to source.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Enable PXP on RT1050 EVK, and apply LVGL settings optimized for PXP
support. These settings will enable PXP rotation to function as expected
when using LVGL with the RT1050.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Pin muxing for i2c6 and csi should be separated as i2c is initialized
before csi. Otherwise, i2c6 bus device will not be ready when the
camera sensor on this bus initializes.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Configure to use XMCD as the bootheader by default instead of DCD. As
XMCD gives a better SDRAM memory access speed.
As an example, the Pixel Processing Pipeline is 13 ms faster with XMCD
compared to DCD as the bootheader.
Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Currently, only DCD bootheader was supported to configure the SDRAM.
On IMX RT1170, XMCD can be used as an alternative boot header to DCD.
XMCD is more advanced than DCD and enhances SDRAM access speed.
This is benefit for SDRAM access application.
Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
This commit is to fix some GPIO test case build issue:
https://github.com/zephyrproject-rtos/zephyr/issues/72619
In fact, the issue is introduce by expander GPIO PR:
https://github.com/zephyrproject-rtos/zephyr/pull/69330
It is used to add GPIO expander support, in this PR, dts node layout is:
lpi2c {
MFD driver {
gpio driver {
}
}
}
The initial idea is to disable all these node by default in order to keep
a minimal default image, but expander GPIO PR only disabled lpi2c and MFD
driver node, but enabled gpio driver node, so gpio driver will report
building error as it depends on expander and i2c which are disabled, so
this fix is to disable gpio node. If we want to use expander gpio, we
need to enable i2c, expander and gpio nodes simultaneously.
Some GPIO test cases have been enabled on i.mx93 EVK board by enabling
onchip GPIO controller in the overlay, for example:
tests/drivers/gpio/gpio_basic_api/boards/imx93_evk_mimx9352_a55.overlay
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Used multiple places in the tree. The idea is to determine if this node
corresponds to a specific node (e.g: flexspi) so that specific
configurations can get done. Without the fix, the macro expansions were
defaulting to false.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Fix SD card pinctrl setup for the VMU RT1170 board. The following
changes were made:
- use the "cd-gpios" property over detecting the card using the
USDHC card detect register. This should be more reliable.
- bias the clk pin high. This matches setup for the RT1170 EVK SD
pinctrl.
- remove the drive strength setting for SD pins to align with the
pinctrl settings for low speed SD mode (50 MHz) on the RT1170 EVK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable ADP5585 as GPIO expander on i.MX93 EVK.
- Add dts node for ADP5585 under lpi2c2.
- Add gpio-hog for EXP_SEL signal.
- Disable lpi2c2 and adp5585 node by default
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Add support for IS66WVQ8M quadspi PSRAM on the RW612 BGA board, and
update board pin control to enable muxing PSRAM pins on the FlexSPI.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Switch the default MCUBoot FW Update mode from Swap & Scratch
to more preferable Swap & Move for the rest of NXP boards.
Delete the scratch partition. Save RAM & ROM.
Slot 0 has one additional sector, for use with
the swap move algorithm.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
The MEMC driver in memc_mcux_flexspi.c is initialized
before the FlexSPI driver (flash_mcux_flexspi_nor.c)
and hangs during FlexSPI init. Initialize the FlexSPI
clock to 50MHz before the speed is set to the optimum
speed by the FlexSPI driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Updated the frdm_mcxn947 with support for the
CTimer counter.
Signed-off-by: William Tang <william.tang@nxp.com>
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Fixes warnings when building documentation due to additional SoC
names being part of the Kconfig symbols which they should not be
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This patch is to fix issue #71473.
The commit 0be0d2175b revert some change
introduced by hwmv2 which allows defconfig can be overlay, so revert
back defconfig to be full configure files which includes all items used
by the board variants.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
FTM internal counter can be clocked by one of three clock sources
independent of the module bus clock. This patch introduces a DT property
to perform the clock selection from DT.
DT sources are updated to keep the current clock selection for all boards,
with exception of ucans32k1sic board which is migrated to use system
clock by default, as this seems to be a better choice for most cases.
Some PWM LED samples require slower clock so overlays are added for
those cases.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Convert all of the NXP SOCs with ENET to use the new
binding scheme, which is used by the new driver.
Convert any boards using this SOC to the new scheme as well,
and remove from the documentation the bit about the experimental
nature of the new driver and the overlay that shall no longer exist.
Some of the boards I do not have the hardware of, so apologies
if something breaks, as I have no way to know. All the boards
were made sure to at least build.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The MAC address macros are ridiculous in this driver.
Rewrite to be simpler and use eth.h common function.
Also, clarify the mac address generation on the DT overlays.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Enable serial interface on i.MX8ULP.
This also includes a SHA update for hal_nxp which
pulls in the following commits relevant to Zephyr:
* 3366f234ed47 build: hal_nxp: add TPM counter support
* 6544455fcf46 Compile in PXP driver if LVGL is set to use
PXP.
* 31463a848bcd devices: MIMX8UD7: add definition for
LPUART_RX_TX_IRQS
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add support for USBOTG on RW612 BGA board. This support was tested with
the USB console sample, as well as the USB DFU sample.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Board name contains the `adsp` suffix and so should the
defconfig. Otherwise, the build system won't be able to
fetch the board configurations.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
CSS was deprecated from the mcu-sdk. Removing driver from lpc55s36
to clear build error.
This is a temporary patch to remove the build error.
Fixes#69961
Signed-off-by: David Leach <david.leach@nxp.com>
Adjustments of dts and defconfig files to adjust for the MERGE removal.
The revert of MERGE requires specific dts and defconfig files for boards
which relied on the MERGE feature.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Splits configuration up that was merged as part of hwmv2 due to
the merged configuration feature being reverted
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit enables pinctrl on i.MX8ULP. This includes:
1) Adding `pinctrl_soc.h` header file.
2) Adding DTS node for IOMUXC1, which is one of the
IPs responsible for managing the 8ULP pads.
3) Adding .dtsi with pin definitions. For now, only
the LPUART7 pads are added to this file because this
is going to be the only consummer for now.
4) Modifying the `pinctrl_imx.c` driver to work for 8ULP.
5) Enabling the `CONFIG_HAS_MCUX_IOMUXC`, which is a
dependency of `CONFIG_PINCTRL_IMX`.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Enable support for LCDIC on rd_rw612_bga. This support also enables
acceleration features such as DMA for LVGL, to improve performance
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add pinctrl and board enablement for LPUART2, which is broken out to
P4_2 and P4_3 on the FRDM board.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Automatically select CONFIG_GPIO when the GPIO-controlled CAN transceiver
driver is enabled. Update board configurations to benefit from this.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
In preparation for adding AMP support for i.MX RT6xx family we need
to rename existing cm33 support files to more specific names.
e.g mimxrt685_evk.dts -> mimxrt685_evk_mimxrt685s_cm33.dts
This will allow us to later add support for Cadence DSP found on i.MX
RT6xx series.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
imxrt6xx are dual core devices featuring an ARM Cortex-M33
core and an Cadence Xtensa HIFI4 Audio DSP.
Currently only m33 core is supported. In order to support
the Cadence DSP we need first to do some code-reorganization
for m33.
We start by moving all cm33 related code to its own directory
and introduce the cpuclusters property in soc.yml file.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Fixs USDHC by setting PWR and CD gpio's correctly.
Adds missing button from the GPS module.
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Add pinctrl for SAI1 node. This means:
1) Adding definitions for the pads used by SAI1.
2) Creating a pin group and referencing it in
the SAI1 node via the `pinctrl-0` property.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
