On STM32L4, 14 pins (Port G[15:2]), require external power supply.
Activate this at port G init when PWR_CR2_IOSV is defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for Low Speed External 32.768 kHz oscillator (LSE ).
Add support for MSI PLL-Mode offering an automatic calibration feature
in combination with the LSE. This allows the MSI to reach an accurate
+/-0,25% clock perfectly suitable for USB full-speed clock.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00
Renamed from arch/arm/soc/st_stm32/stm32l4/soc.h (Browse further)
