Rename the following properties in bindings and DTS:
-- freqs_mhz => freqs-mhz
-- cg_reg => cg-reg
-- pll_ctrl_reg => pll-ctrl-reg
Signed-off-by: James Roy <rruuaanng@outlook.com>
Add a DTS binding for the MediaTek Audio Front End device, and
definitions for the in-tree devices.
These .dts files were auto-generated from pre-existing SOF code (that
defined the devices as C structs) using a tool currently being
submitted in the SOF tree, thus are included here as separate files.
The expectation is that future variants will be authored in this
format directly. Longer term we can move them directly into the core
board DTS.
Signed-off-by: Andy Ross <andyross@google.com>
The two interrupt controller registers on 818x got spoonerized, oops.
Hilariously it actually worked (mostly) becuase the interrupt would
still be delivered, the controller isn't involved in the ACK/clear
process on thsi device, the and the set of pending interrupts was
masked against enabled ones. Found it by accident when I moved things
around and caught a "spurious" interrupt.
Also the 8195 DRAM region was all packed in a single block that doesn't
honor the two regions defined in the host devicetree. That's benign
from Zephyr (the memory in the hole actually is usable) but dangerous
for SOF as the second region is used by the host driver to allocate
DMA buffers and we can't touch it except as directed. Honor the
scheme used by the other devices.
Signed-off-by: Andy Ross <andyross@google.com>
Add Zephyr support for the Audio DSP on the MT8196 SOC. This is a
very similar device to previous designs. Most of this patch is just
DTS.
The biggest delta is the more complicated second level interrupt
controller, though it is still able to be represented using some
vaguely clever DTS config over the older intc_mtk_adsp driver.
Also the memory layout is slightly different, requiring a little
indirection to set the initial boot stack address and log output
buffer. And the timer "irq_ack" register bits moved.
Signed-off-by: Andy Ross <andyross@google.com>
Add a twister YAML file for these devices. Right now they're flagged
as xt-clang only, though xcc and SOF-derived gcc toolchains are known
to work too. We'll enable the zephyr SDK once sdk-ng support lands.
Signed-off-by: Andy Ross <andyross@google.com>
These are very similar devices to mt8195, minimal changes needed
beyond boilerplate configuration.
In the process, this reworks the board/soc layout to be HWMv2
compliant, with "adsp" becoming a CPU cluster beneath the SOC. So the
name of the boards to west become e.g. "mt8195/mt8195/adsp" (which can
be shortened to "mt8195//adsp" if desired).
Note that the cpuclk driver is not yet ported, it works only with 8195
(the clocking/power architecture seems similar between the parts, but
the graph of wells and clocks is different and historically these have
been three separate drivers in SOF). The biggest changes are in the
image/loader scripts, which needed some rework for cross-device
portability.
Signed-off-by: Andy Ross <andyross@google.com>
Full name was set based on the information available either in board
documentation or in Twister files.
Whenever applicable, vendor name was dropped from the full name so that
all boards have a consistent naming scheme.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This removes the prompts for the mt8195 and related kconfigs,
so these cannot be overridden from command line (though
technically they cannot be disabled as they are being selected).
This also prevents them from appearing in the build .config
file as not being set even when we are being for other SoCs.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is a soc/board integration for the MediaTek Audio DSP device on
the MT8195 SOC, along with a Zephyr mtk_adsp soc integration that will
work to support similar 8186 and 8188 device shortly.
A python loader (similar to cavsload.py) is included that will run in
developer mode on current chromebooks (an HP x360 13b-ca000 was
tested) with an unmodified kernel.
Signed-off-by: Andy Ross <andyross@google.com>
