The board features a STM32F405RGT6 MCU.
The code is based on boards/arm/olimex_stm32_p405 and
boards/arm/olimex_stm32_h103.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
The spi node of the led_ws2812 now includes the frame format
as defined by the dts bindings spi-device.yaml
SPI_FRAME_FORMAT_TI is selected with overlay for target boards.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
the stm32 spi drivers now takes the DTS frame_format property
from the include/ drivers/spi.h
It will be possible to select the Motorola (default)
or TI from the DTS entry of the device,
when soc supports it, else a run time error is raised.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The Q variant is the same as non-Q, except the Q has SMPS built-in.
This symbol addition is to have the correct
SOC definition ("STM32H7A3XXQ")
Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
Add kscan0 to support tests/driver/kscan/kscan_api.
When running the tests code on it8xxx2_evb, it shows fatal
error: IRQ is enabled. We find that once polling_task() is
created and executed, the KSI interrupt will be enabled and
before we call irq_connect_dynamic(), so we switch both
function sequence.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Adds fix so that a node running with extended adveriser is able to
enable GATT proxy correctly. This fixes a corner case issue where a
device with no other ongoing message sending is unable to advertise
the GATT proxy through
bt_mesh_gatt_proxy_set(BT_MESH_FEATURE_ENABLED) .
Signed-off-by: Anders Storrø <anders.storro@nordicsemi.no>
- Fix some syntax errors, e.g. :c:kconfig:`...`
- Remove references to missing symbols (replaced with literals)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a dummy driver for the `vnd,adc` compatible to allow compilation of
drivers utilising an ADC when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
On some platforms, HPET is not wired to trigger IRQ 2.
This would make HPET non-functional if the legacy
interrupt routing bit is set in the global config
register. This adds a DTS flag so the driver won't
set the bit to enable legacy interrupt.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add an interrupt driven i2c driver for gd32 i2c peripheral.
The transmit and reception method refer from GD32 SoCs user manual.
Particularly, reception method choose the solution B.
There have some wait for state ready logic in the driver. It cause by
i2c device internal state change slower than i2c driver.
Signed-off-by: HaiLong Yang <cameledyang@pm.me>
The testcase is including a generic configuration conf
for the stm32 target boards when running the SPI loopback in
interrupt and DMA mode. Thus, the board specific conf file is useless.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds two stm32 config to execute the testcase
when the SPI is using interrupt mode for transfer.
when the SPI is using DMA for transfer (not Interrupt nor ASYNC mode).
to run the on some specific (listed) stm32 boards on SPI instance.
Note the hw fixture (physical connection on the board)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix the interrupt setting in the fvp_baser_aemv8r dts:
- The correct interrupt number is 5, not 0.
- The interrupt priority and type are swapped.
This patch also enables interrupt driven mode for this platform as this
is the ideal setting for a Fast Models based platform.
Issue-ID: SCM-4037
Signed-off-by: Filipe Rinaldi <filipe.rinaldi@arm.com>
Change-Id: Ic4815f5afe4c9df9d8fe373d47d2773d64087c96
Add configuration to support onboard LED and button.
- LED_R: PC13 (active low/output)
- LED_G: PA1 (active low/output)
- LED_B: PA2 (active low/output)
- BOOT0: PA8 (active high/input)
And enable timer1 to control LED_G and LED_B with PWM.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
We will soon need to do more boundary checking to test whether we are
reading secure or non-secure memory.
Refactor the boundary checking in preparation for this.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Adding UART samples to "Drivers: Serial/UART" so that the maintainer
will be notified for relevant PRs in the future.
Signed-off-by: Martin Jäger <martin@libre.solar>
The STM32 single_wire example was merged in parallel to this sample
and ended up as a sub-folder of this one. Separate both into their
own folders.
Signed-off-by: Martin Jäger <martin@libre.solar>
dts/bindings/timer/riscv,machine-timer must have compatible name
riscv,machine-timer. nuclei,machine-timer is wrong, correct it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Hexdump via logging is supposed to be human-readable for
debug information. Therefore, it should actually print
in human-readable form (well... after some magical decoder
has processed the raw MIPI Sys-T output).
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
GPIOTE channel was not freed when pin was reconfigured. This lead to
channel pool draining when pin was frequently reconfigured.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
If ARM semihosting is selected, automatically enable the pyOCD feature.
This way the console output is directly available on the telnet port.
Signed-off-by: Casper Meijn <casper@meijn.net>
This is the matching commit to the previous one that swaps the
protocol used for window logging for sys_winstream.
The advantage is especially clear for the reader. The old protocol
was complicated and race-prone, requiring whole-buffer reads for
reliability. The new one is tiny and fast.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The newer sys_winstream utility is considerably simpler and much
faster for the reader. Use that instead.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
It's not uncommon to have Zephyr running in environments where it
shares a memory bus with a foreign/non-Zephyr system (both the older
Intel Quark and cAVS audio DSP systems share this property). In those
circumstances, it would be nice to have a utility that allows an
arbitrary-sized chunk of that memory to be used as a unidirectional
buffered byte stream without requiring complicated driver support.
sys_winstream is one such abstraction.
This code is lockless, it makes no synchronization demands of the OS
or hardware beyond memory ordering[1]. It implements a simple
file/socket-style read/write API. It produces small code and is high
performance (e.g. a read or write on Xtensa is about 60 cycles plus
one per byte copied). It's bidirectional, with no internal Zephyr
dependencies (allowing it to be easily ported to the foreign system).
And it's quite a bit simpler (especially for the reader) than the
older cAVS trace protocol it's designed to replace.
[1] Which means that right now it won't work reliably on arm64 until
we add a memory barrier framework to Zephyr! See notes in the code;
the locations for the barriers are present, but there's no utility to
call.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
If the advertiser is not running, the host can now set
periodic advertising data in multiple operations.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Provide possibility to have instance specific callbacks
for writing the FW image and executing the update
Signed-off-by: Jarno Lamsa <jarno.lamsa@nordicsemi.no>
Previously the object 5 was only single instance object. Provide
backwards compatibility, so it can be continued to use with single
instance.
Signed-off-by: Jarno Lamsa <jarno.lamsa@nordicsemi.no>
This is a proof-of-concept implementation.
A device might have multiple firmware images which needs to be updated
separately. For example a single device might have
* A bootloader image
* An application image
* External firmware image
Instead of pushing all these updates through the object instance 0 -
/5/0 - here a split to multiple has been made possible.
Signed-off-by: Veijo Pesonen <veijo.pesonen@nordicsemi.no>
This PR adds the different handling of temperature sensor for the
STM32L5 soc. In this soc, there are some calibration settings which
need to be applied for temperature conversion.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
