All these sort of helpers were removed from tree a while ago, this one
was missed as it uses a custom name.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If dev was null, caller would have faulted before since dev->api needs
to be accessed before reaching this point. Also, a well-defined device
will never have a NULL dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The API spec states that calling pin_set() with period set to 0 is
equivalent to set the PWM channel to an inactive level. Some drivers
treat this input as invalid (-EINVAL), however, it's an unsupported
feature. Maybe it's due to copy&paste effect? This changes error message
to be clear and changes return value to -ENOTSUP for this case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The API call checks for this condition before calling the pin_set driver
OP call, so drivers don't have to do this check now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add lpc iocon pinctrl driver. Driver handles IOCON clock initialization as
well as IOCON pin configuration
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Current code uses per-core register to check interrupt status and
dispatch handlers. However to disable/enable the interrupt, core
zero register is always used.
While the handlers in _sw_isr_table are common for all cores,
the status bits should still be handled separate for each core.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Verify read access to the timing and timing_data parameters in
z_vrfy_can_set_timing() and pass a copy of these structs to the
implementation as recommended for Zephyr system calls.
Remove unnecessary typecasts.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The MCP2515 requires phase segment 2 to be at least 2 time quanta.
The prescaler has a 6 bit register, allowing for real-world prescaler
values between 1 and 64.
Fixes: #44484
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix the bounds check for the data phase prescaler timing parameter. The
maximum allowed value is 0x20, not 20 decimal.
Fixes: #44483
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Take CAN_SJW_NO_CHANGE into account when bounds checking the sjw timing
parameter values.
Fixes: #44482
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.
This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
Updates to MEC15xx i2c error handling:
1. timeout_seen handling is simplified. For all errors we
continuously poll
2. error flag is not set for timeout_seen handling and hence
recover_from_error() call is not required.
3. In i2c_xec_poll_write(), ETIMEDOUT for (START + ADDRESS) byte
is treated as default error and error_seen flag is set (instead
of timeout_seen flag)
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Even if not used DMA HAL is required in F4 SD HAL driver. Just
as for L4/F7 series that have been added before.
Add it for this specific serie.
Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
Setting event timer count at least 1 hw count, it's redundant,
so I clean up this else {} case. And add the comment about
the K_TICKS_FOREVER and INT_MAX case.
NOTE:
CONFIG_TIMEOUT_64BIT = y, then k_ticks_t type is int64_t.
K_FOREVER is (k_timeout_t) { .ticks = (K_TICKS_FOREVER) },
and K_TICKS_FOREVER is ((k_ticks_t) -1),
so K_FOREVER is a k_timeout_t type structure, and
the member ticks: type int64_t,
value (= K_TICKS_FOREVER) 0xFFFF FFFF FFFF FFFF.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add a new boolean devicetree property `tx-rx-swap` to the
st,stm32-usart binding, used to control TX/RX swap during
device initialization.
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
Remove the limitiation in HWINFO_NRF not working in non-secure
configuration. Use the exposed soc_secure_read_deviceid function
that accesses the device ID through the secure services.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Allows the setting of ieee802154 EUI64 address in non-secure processing
environment by reading the FICR device ID through the secure service.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The can_get_max_bitrate() is an optional API function. Limit validation
to the CAN device driver pointer.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Instead of selecting appropriate HAS_HW_NRF_* options for particular
nRF SoCs (and simulated nRF52 target), set their values basing on
information from devicetree.
Correct also semantics of those options so that they are set only when
a corresponding DT node is enabled. This allows using them directly in
Kconfig dependencies of Zephyr drivers for nRF peripherals. Update
appropriately these dependencies.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The function in its current form is confusing because unlike other
similarly named functions (dt_nodelabel_has_prop(), dt_node_has_prop())
or devicetree macros (DT_NODE_HAS_COMPAT(), DT_NODE_HAS_PROP()), this
function takes into account the status of the checked node and returns
"y" only when the node is enabled.
This commit redefines dt_nodelabel_has_compat() so that it no longer
checks the node status, and for cases where the previous functionality
is needed, a new function named dt_nodelabel_enabled_with_compat()
is introduced as a replacement.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
ESP32C3 requires master init call to enable its clock
gate. Without this, SPI interface may not initialize
properly.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Don't leave idle state if soc isn't waked-up by an interrupt.
(We change to check interrupt controller register)
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Verify the get_state API call in z_vrfy_can_get_state(). Adjust sizeof()
arguments to match the rest of the file.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Verify the add_rx_filter API call in z_vrfy_can_add_rx_filter_msgq() as
this is used by the underlying implementation. Remove unnecessary
typecasts.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Do not attempt to verify that the current thread has access to the void
*user_data argument to z_vrfy_can_send(). The size of the data is not
known and no driver code will try to dereference it (it may not even be
a valid pointer).
Remove unnecessary typecasts from z_vrfy_can_send().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
To allow for high level robustness tests on protocols, add an interface
to control the packet drop rate. A rate of 0 means no packet dropped, a
rate of 1 means all packets being dropped.
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
ITE RTOS timer HW frequency is fixed at 32768Hz, because this
clock source is always active in any EC mode (running/doze/deep doze).
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
We don't need to convert the free run clock count,
that will be converted by the kernel
(base on CONFIG_SYS_CLOCK_TICKS_PER_SEC),
so we should return the HW register count value directly.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
When NO_OPTIMIZATIONS is set and asynchronous API is used but
HW counting is not enabled then linking fails because of lack of
nrfx_timer code. When optimization is enabled, linker is smart
enough to figure out that nrfx_timer is not used.
Converting decision function from static inline function to macro
which is handled correctly with optimization off.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Rather than defining them in the header, require a set of defines
be provided to cavs_hda.h as part of the expected input to the API.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds an initial driver for HDA streams on cAVS. A common code base is
provided for all HDA streams while the drivers are identified
differently as they have small behavior differences.
Uses dma_status to describe the positions for read/write. Uses dma_reload
to inform when to move the read/write positions. This closely follows
how HDA is being used in SoF
Simple test case is provided for both drivers.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
