The period cell will soon be required by the pwm_dt_spec facilities,
this patch adds it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The application may not always use the PSL mode. Change the status of
node vsby-psl-in-list default disabled. The application can override it
when it wants to use PSL hibernate.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The FIU/UMA module in the NPCX chip provides an dedicated SPI interface
to access the SPI flash. This commit adds the driver support for it.
With this commit, the application can call the flash APIs
(via spi_nor.c) to access the internal flash of NPCX EC chips.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I32bbf09f6e014b728ff8e4692e48151ae759e188
The NPCX I2C implementation contains two modules, an I2C port and an
I2C controller. Disable the I2C controller nodes by default and require
the user to enable both the I2C port and controller in the devicetree.
Signed-off-by: Keith Short <keithshort@google.com>
The booter (bootloader) behavior may be different in different NPCX
chip series. One example is that the booter sets host interface type in
NPCX7 series but leave the firmware to set it in NPCX9 series.
This commit adds a new DT node to record variants in its properties.
NPCX drivers can understand if they need to configure the related
setting by checking the node's properties.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This CL moves the phandles which don't contain 'reg' prop. from 'soc' to
'soc-if' node since they are the interface phandles only. It also
prevents "missing or empty reg/ranges property" warning messages.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Nuvoton provides different series MCU. The NPCX series has a specific
id, which can identify the real chip part number. This CL adds soc id
for the NPCX series.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
The PS/2 module in npcx provides a hardware accelerator mechanism
including an 8-bit shift register, a state machine, and control logic
that handle both the incoming and outgoing data. The hardware
accelerator mechanism is shared by 4 PS/2 channels. To support it,
this CL separates the PS/2 driver into channel and controller drivers.
The controller driver is in charge of the PS/2 transaction. The channel
driver is in charge of the connection between the Zehpyr PS/2 API
interface and controller driver.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This CL introduces six properties, clock-frequency, core-prescaler,
apb1/2/3/4-prescaler in pcc (Power and Clock Controller) node to
configure clock settings. It also removed the original Kconfig options
used for the same purpose.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Arrange device-tree files of npcx7 series by following steps:
1. Move device-tree declarations of npcx family to npcx.dtsi.
2. Leave specific device declarations of npcx7 series to npcx7.dtsi.
3. Move chip series related mapping tables such as
npcx7-miwus-wui-map.dtsi and so on to npcx/npcx7 folder.
4. Move common device-tree declarations used in each npcx series to
npcx-miwus-wui-map.dtsi and so on to npcx folder.
Then, the npcx device-tree folders are arranged to:
dts/arm/nuvoton
|--npcx
| |--npcx7
| | |--npcx7-miwus-wui-map.dtsi
| | |--npcx7-alts-map.dtsi
| | |--.....
| |--npcx-miwus-wui-map.dtsi
| |--npcx-alts-map.dtsi
| |--.....
|
|--npcx.dtsi
|--npcx7.dtsi
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
