Commit graph

11 commits

Author SHA1 Message Date
Flavio Ceolin
61a1057ea5 kernel: Remove redundant type name
struct k_thread already has a pointer type k_tid_t, there is no need for
this definition to tcs.

Less symbols/names make the code cleaner and more readable.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-10-31 19:43:47 -04:00
Flavio Ceolin
67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Wayne Ren
b09b6b6ee8 arch: arc: add comments for _load_stack_check_regs
add comments for _load_stack_check_regs to avoid
wrong usage

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-06-04 13:31:43 -04:00
Wayne Ren
b829bc78c1 arch: arc: refactor the arc stack check support
* the original stack check codes have no consideration
  for userspace case. This will wrong cause possible stack
  check exception.
* this commit refactors the arc stack check support to
  support the usperspace.

* this commit fixes #7885. All the failed tests in #7885
  are run again to verify this commit. The test results are ok

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-06-04 13:31:43 -04:00
Wayne Ren
e91733c78b arch: arc: bug fixes and add user space support in secure mode
* bug fixes
* add user space support in secure mode

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
f81dee0b2b arch: arc: add user space support for arc
* add the implementation of syscall
  * based on 'trap_s' intruction, id = 3
* add the privilege stack
  * the privilege stack is allocted with thread stack
  * for the kernel thread, the privilege stack is also a
    part of thread stack, the start of stack can be configured
    as stack guard
  * for the user thread, no stack guard, when the user stack is
    overflow, it will fall into kernel memory area which requires
    kernel privilege, privilege violation will be raised
* modify the linker template and add MPU_ADDR_ALIGN
* add user space corresponding codes in mpu
* the user sp aux reg will be part of thread context
* When user thread is interruptted for the 1st time, the context is
  saved in user stack (U bit of IRQ_CTLR is set to 1). When nest
  interrupt comes, the context is saved in thread's privilege stack
* the arc_mpu_regions.c is moved to board folder, as it's board
  specific
* the above codes have been tested through tests/kernel/mem_protect/
  userspace for MPU version 2

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
16028b5a38 arc: Fix the bug in _load_callee_saved_regs
load floating register first, or the value of r13 is not correct

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-05-19 15:58:41 +02:00
Huaqi Fang
9bc69a46fa boards: Update arc em_starterkit support from 2.2 to 2.3
Here are the main changes:
* board: Update EMSK onboard resources such as Button, Switch and LEDs
  + update soc.h for em7d, em9d, em11d
  + update board.h for em_starterkit board
* arc: Add floating point support and code density support
  + add kconfig configuration
  + add compiler options
  + add register definitions, marcos, assembly codes
  + fixes in existing codes and configurations.
* arc: Update detailed board configurations for cores of emsk 2.3
* script: Provide arc_debugger.sh for debugging em_starterkit board
  + make BOARD=em_starterkit debug
    This will start openocd server for emsk, and arc gdb will connect
    to this debug server, user can run `continue` command if user just
    want to run the application, or other commands if debugging needed.
  + make BOARD=em_starterkit debugserver
    This will start an openocd debugger server for emsk, and user can
    connect to this debugserver using arc gdb and do what they want to.
  + make BOARD=em_starterkit flash
    This will download the zephyr application elf file to emsk,
    and run it.

Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
2017-05-19 15:58:41 +02:00
Andre Guedes
6f141a5576 quark_se: PM: Add multicore support
This patch changes Quark SE power drivers to support multicore scenarios
e.g. both LMT and ARC core are enabled and manage power.

Handling LPS states in multicore scenarios are dead simple because LPS
states are core-specific states. It means that putting the LMT core in
LPS doesn't affect the ARC core, and vice-versa. DEEP_SLEEP state, on
the other hand, affects both cores since it turns power off from the SoC
and both cores are shutdown. It means that if LMT puts the system in
DEEP_SLEEP, ARC core is shutdown even if it is busy handling some task.

In order to support the multicore scenario, this patch introduces the
SYS_POWER_STATE_DEEP_SLEEP_2 state to both ARC and x86 power drivers.

On ARC, this state works as following:
1) Save ARC execution context;
2) Raise a flag to inform the x86 core that ARC is ready to enter in
   DEEP_SLEEP;
3) Enter in the lowest core-specific power state, which in this case is
   LPSS.

On x86, DEEP_SLEEP_2 is very similar to DEEP_SLEEP. The difference relies
in the post_ops() which calls _arc_init() in order to start ARC core so
it can restore its context.

This patch also adds the test/power/multicore/ directory which provides
sample application to x86 and ARC cores in order to easily verify the
multicore support. In test/power/multicore/README.rst you can find more
details regarding the applications.

Jira: ZEP-1103

Change-Id: Ie28ba6d193ea0e58fca69d38f8d3c38ca259a9ef
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2017-01-24 13:36:55 +00:00
David B. Kinder
ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Julien Delayen
176d184fb8 power: Add ARC core suspend and resume support
When going into DEEP_SLEEP mode, the ARC core now saves
its context. This includes:
- All core registers
- Stack pointer
- Program counter (restored by jumping to the restore code)

The arc reset code now checks if the GPS0 bit 2 is set.
This is similar to the behavior of the x86 core done by
the QMSI bootloader which is setting GPS0 bit 1 in order
to call the restore path instead of cold boot path.

The sample has been adapted in order to support the ARC.

Jira: ZEP-1222

Change-Id: I375f03b16b8a5fd1f07ead55cf7e4947d6290c9f
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
2016-12-15 12:49:33 +00:00
Renamed from arch/arc/core/swap_macros.h (Browse further)