Commit graph

6 commits

Author SHA1 Message Date
Thomas Altenbach
cc51031445 drivers/entropy: stm32: fix inter-core race condition
On STM32WB and dual-core STM32H7 MCUs, the RNG peripheral is shared
between the cores and its access is protected by a hardware semaphore.
Locking was not performed in the current entropy driver, leading to a
race condition when multiple cores concurrently used the RNG. This
commit implements the necessary logic for locking the HSEM during entropy
generation on multi-core STM32 MCUs. It also reconfigures the RNG in case
the configuration was changed by the other core, as this can happen e.g
on STM32WB MCUs.

Signed-off-by: Thomas Altenbach <taltenbach@witekio.com>
2022-05-13 10:28:53 -05:00
Gerard Marull-Paretas
0e69129fb3 soc: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:59 +02:00
HaiLong Yang
9a80196e28 soc: arm: st_stm32: update HSEM ID for stm32 hsem ipm
New hardware semaphore ID for inter-processor mailbox

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2021-08-09 16:11:28 +02:00
Martin Jäger
9f23196121 soc: arm: stm32: hsem: use generic LL headers
Include generic header stm32_ll_hsem.h from stm_hsem.h (which is used
by multiple drivers) instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Alexandre Bourdiol
6bc559bdaa soc: arm: st_stm32: update HSEM ID from STM32WB cube update
New Hardware semaphore ID have been defined in STM32WB cube

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-09-02 14:13:49 +02:00
Alexandre Bourdiol
c8ceca2d53 drivers: STM32 dualcore concurrent register access protection with HSEM
In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-07-09 11:27:56 +02:00