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Author	SHA1	Message	Date
Huifeng Zhang	2c22e83dfb	include: arch: arm: Remove aarch32 directory This commit follows the parent commit work. This commit introduces the following major changes. 1. Move all directories and files in 'include/zephyr/arch/arm/aarch32' to the 'include/zephyr/arch/arm' directory. 2. Change the path string which is influenced by the changement 1. Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>	2023-09-13 10:08:05 +01:00
Prashanth S	05fe627d79	drivers: interrupt-controller: Add VIM Interrupt Controller support Add TI VIM (Vectored Interrupt Manager) interrupt controller support. VIM is a TI specific custom interrupt controller for ARM cores. In J721E soc, VIM aggregates interrupts to Cortex R5 cores. TRM for J721e https://www.ti.com/lit/zip/spruil1 File: spruil1c.pdf VIM: section 6.3.3.6 Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>	2023-09-04 10:53:09 +02:00

Author

SHA1

Message

Date

Huifeng Zhang

2c22e83dfb

include: arch: arm: Remove aarch32 directory

This commit follows the parent commit work.

This commit introduces the following major changes.

  1. Move all directories and files in 'include/zephyr/arch/arm/aarch32'
    to the 'include/zephyr/arch/arm' directory.

  2. Change the path string which is influenced by the changement 1.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>

2023-09-13 10:08:05 +01:00

Prashanth S

05fe627d79

drivers: interrupt-controller: Add VIM Interrupt Controller support

Add TI VIM (Vectored Interrupt Manager) interrupt controller support.
VIM is a TI specific custom interrupt controller for ARM cores.
In J721E soc, VIM aggregates interrupts to Cortex R5 cores.

TRM for J721e https://www.ti.com/lit/zip/spruil1
File: spruil1c.pdf
VIM: section 6.3.3.6

Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>

2023-09-04 10:53:09 +02:00

2 commits